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參數(shù)資料
| 型號(hào)： | AMIS-52100-A |
| 英文描述： | Transceiver with Clock and Data Recovery |
| 中文描述： | 收發(fā)器時(shí)鐘和數(shù)據(jù)恢復(fù) |
| 文件頁數(shù)： | 20/26頁 |
| 文件大?。?/td> | 1040K |
| 代理商： | AMIS-52100-A |
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AMIS-52100
Low-Power Transceiver with Clock and Data Recovery
Data Sheet
Table 26: Auto Slice Control Registers
Auto Slice Control Registers
Register (HEX)
0x0a
Name
DATA SLICE
THRESHOLD
HYSTERESIS
Bits
All
States
Comments
Set a fixed reference level for the slice output to be
compared to in the DAC mode
0mV hysteresis used in the threshold circuit
20mV hysteresis used in the threshold circuit
50mV hysteresis used in the threshold circuit
100mV hysteresis used in the threshold circuit
DAC mode used for data detection (DEFAULT)
Average mode used for data detection
Peak mode used for data detection
DAC mode used for data detection
00
01
10
11
00
01
10
11
0,1
0x0f
AUTOSLICE
2,3
9.6 Data and Clock Recovery
Data recovered in a noisy environment or from a small RF signal usually is jittery. The AMIS-52100 can remove much of that data jitter
by recovering a synchronous clock signal from the incoming data. The AMIS-52100 can be set to do auto slice data detection. The
clock and data recovery circuits can be programmed to generate a data clock for synchronously clocking the data out of the AMIS-
52100, removing much of the jitter in this process. The AMIS-52100 has an internal PLL that must be programmed to the frequency of
the data by setting the values in the FWORD register and setting the coefficients of the filter. If these values are close to the data rate,
the AMIS-52100 will recover the data clock from the incoming detected data. The CDR circuit can also be set or clamped with a
tolerance to the frequency difference between the supposed data rate and the actual data rate to improve the performance of the CDR
function. The CDR circuit can be set to reset after a programmed number of data time periods without data. This stop check function
allows the CDR circuit to reacquire the clock when new data is received, maintaining better clock to data synchronization.
Table 27 presents the registers associated with the data and clock recovery function. Refer to the AMIS application note “Clock and
Data Recovery Circuit Operation and Setup” for more information.
20
AMI Semiconductor
– Rev 4.0, Mar. 06 – M-20535-004
www.amis.com
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| AMIS-52100-I | Transceiver with Clock and Data Recovery |
| AMIS-52100-M | Transceiver with Clock and Data Recovery |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AMIS-52100-I | 制造商:AMI 制造商全稱:AMI 功能描述:Transceiver with Clock and Data Recovery |
| AMIS-52100-M | 制造商:AMI 制造商全稱:AMI 功能描述:Transceiver with Clock and Data Recovery |
| AMIS-52150 | 制造商:AMI 制造商全稱:AMI 功能描述:Low-Power Transceiver with Clock and Data Recovery |
| AMIS-52150-XTD | 功能描述:射頻收發(fā)器 RF TRNSCVR SUB-1GHZ RoHS:否 制造商:Atmel 頻率范圍:2322 MHz to 2527 MHz 最大數(shù)據(jù)速率:2000 Kbps 調(diào)制格式:OQPSK 輸出功率:4 dBm 類型: 工作電源電壓:1.8 V to 3.6 V 最大工作溫度:+ 85 C 接口類型:SPI 封裝 / 箱體:QFN-32 封裝:Tray |
| AMIS-52150-XTP | 功能描述:射頻接收器 RF TRNSCVR SUB-1GHZ CDR RoHS:否 制造商:Skyworks Solutions, Inc. 類型:GPS Receiver 封裝 / 箱體:QFN-24 工作頻率:4.092 MHz 工作電源電壓:3.3 V 封裝:Reel |
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