參數(shù)資料
型號： AMC0XXCFLKA
廠商： Advanced Micro Devices, Inc.
英文描述： 1, 2, 4, or 10 Megabyte 5.0 V-only Flash Memory PC Card
中文描述： 1，2，4，或10兆字節(jié)5.0 V型只有閃存PC卡
文件頁數(shù)： 6/42頁
文件大?。?/td> 273K
代理商： AMC0XXCFLKA
6
AmC0XXCFLKA
5/4/98
Word-Wide Operations
The “C” series cards provide the flexibility to operate on
data in a byte-wide or word-wide format. In word-wide
operations the Low-bytes are controlled with CE1 when
A0 = 0. The High-bytes are controlled with CE2 with
A0 = don’t care.
Table 1.
Common Memory Bus Operations
Legend:
X = Don’t Care, where Don’t Care is either at V
IL
or V
IH
level. See DC Characteristics for voltage levels of normal TTL or CMOS
input levels.
Notes:
1. V
PP
pins are not connected in the 5.0 V-Only Flash Memory Card.
2. Manufacturer and device codes may be accessed via a command register write sequence. (Refer to Autoselect Command in
Tables 3 and 4.)
3. Standby current is I
CCS
.
4. Refer to Tables 3 and 4 for valid D
IN
during a byte write operation.
5. Refer to Table 5 for valid D
IN
during a word write operation.
6. Byte access—Even. In this x8 mode, A0 = V
IL
outputs or inputs the “even” byte (low byte) of the x16 word on D0–D7.
7. Byte access—Odd. In this x8 mode, A0 = V
IH
outputs or inputs the “odd” byte (high byte) of the x16 word on D0–D7. This is
accomplished internal to the card by transposing D8–D15 to D0–D7.
8. Odd byte only access. In this x8 mode, A0 = X outputs or inputs the “odd” byte (high byte) of the x16 word on D8–D15.
9. x16 word accesses present both “even” (low) and “odd” (high) bytes. A0 = X.
Pins/Operation
REG
CE2
CE1
OE
WE
A0
D8–D15
D0–D7
READ-ONLY
Read (x8) (Note 6)
V
IH
V
IH
V
IL
V
IL
V
IH
V
IL
High-Z
Data Out-Even
Read (x8) (Note 7)
V
IH
V
IH
V
IL
V
IL
V
IH
V
IH
High-Z
Data Out-Odd
Read (x8) (Note 8)
V
IH
V
IL
V
IH
V
IL
V
IH
X
Data Out-Odd
High-Z
Read (x16) (Note 9)
V
IH
V
IL
V
IL
V
IL
V
IH
X
Data Out-Odd
Data Out-Even
Output Disable
V
IH
X
X
V
IH
V
IH
X
High-Z
High-Z
Standby (Note 3)
X
V
IH
V
IH
X
X
X
High-Z
High-Z
READ/WRITE
Read (x8) (Notes 2, 6)
V
IH
V
IH
V
IL
V
IL
V
IH
V
IL
High-Z
Data Out-Even
Read (x8) (Notes 2, 7)
V
IH
V
IH
V
IL
V
IL
V
IH
V
IH
High-Z
Data Out-Odd
Read (x8) (Notes 2, 8)
V
IH
V
IL
V
IH
V
IL
V
IH
X
Data Out-Odd
High-Z
Read (x16) (Notes 2, 9)
V
IH
V
IL
V
IL
V
IL
V
IH
X
Data Out-Odd
Data Out-Even
Write (x8) (Notes 4, 6)
V
IH
V
IH
V
IL
V
IH
V
IL
V
IL
High-Z
Data In-Even
Write (x8) (Notes 4, 7)
V
IH
V
IH
V
IL
V
IH
V
IL
V
IH
High-Z
Data In-Odd
Write (x8) (Notes 4, 8)
V
IH
V
IL
V
IH
V
IH
V
IL
X
Data In-Odd
High-Z
Write (x16) (Notes 5, 9)
V
IH
V
IL
V
IL
V
IH
V
IL
X
Data In-Odd
Data In-Even
Output Disable
V
IH
X
X
V
IH
V
IL
X
High-Z
High-Z
Standby (Note 3)
X
V
IH
V
IH
X
X
X
High-Z
High-Z
Volt-only
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