參數(shù)資料
型號(hào)： AMC0XXCFLKA
廠商： Advanced Micro Devices, Inc.
英文描述： 1, 2, 4, or 10 Megabyte 5.0 V-only Flash Memory PC Card
中文描述： 1，2，4，或10兆字節(jié)5.0 V型只有閃存PC卡
文件頁(yè)數(shù)： 37/42頁(yè)
文件大?。?/td> 273K
代理商： AMC0XXCFLKA
5/4/98
AmC0XXCFLKA
37
AC CHARACTERISTICS—ALTERNATE CE CONTROLLED WRITES
Write/Erase/Program Operations
Notes:
1.
Rise/Fall e10 ns.
2. Maximum specification not needed due to the internal stop timer that will stop any erase or write operation that exceed the
device specification.
3. Card Enable Controlled Programming:
Flash Programming is controlled by the valid combination of the Card Enable (CE1, CE2) and Write Enable (WE) signals. For
systems that use the Card Enable signal(s) to define the write pulse width, all Setup, Hold, and inactive Write Enable timing
should be measured relative to the Card Enable signal(s).
4. Embedded Program Operation of 16
μ
s consist of 10
μ
s program pulse and 6
μ
s write recovery before read. This is the min-
imum time for one pass through the programming algorithm. D5 = “1” only after a byte takes longer than 48 ms to Write.
Card Speed
Parameter Symbol
Parameter Description
-150 ns
Unit
JEDEC
Standard
Min
Max
t
AVAV
t
WC
Write Cycle Time
150
ns
t
AVEL
t
AS
Address Setup Time
20
ns
t
ELAX
t
AH
Address Hold Time
55
ns
t
DVEH
t
DS
Data Setup Time
50
ns
t
EHDX
t
DH
Data Hold Time
20
ns
t
GLDV
t
OE
Output Enable Hold Time for Embedded Algorithm
20
ns
t
GHEL
Read Recovery Time before Write
0
μ
s
t
WLEL
t
WS
WE Setup Time before CE
0
ns
t
EHWH
t
WH
WE Hold Time
0
ns
t
ELEH
t
CP
CE Pulse Width
65
ns
t
EHEL
t
CPH
CE Pulse Width HIGH (Note 3)
50
ns
t
EHEH3
Embedded Programming Operation (Notes 3, 4)
16
μ
s
48
ms
t
EHEH4
Embedded Erase Operation for each 64K byte Memory Sector
(Notes 1, 2)
1.5
s
t
VCS
V
CC
Setup Time to Write Enable LOW
50
ms
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