參數(shù)資料
型號： AM50DLI28BG
廠商： Advanced Micro Devices, Inc.
元件分類： SRAM
英文描述： Stacked Multi-Chip Package (MCP) Flash Memory and SRAM
中文描述： 堆疊式多芯片封裝（MCP）閃存和SRAM
文件頁數(shù)： 56/64頁
文件大小： 974K
代理商： AM50DLI28BG
January 8, 2003
Am50DL128BG
55
P R E L I M I N A R Y
pSRAM AC CHARACTERISTICS
Figure 30.
Page Read Timing
Notes:
1. t
OD,
t
ODo
, t
BD
, and t
ODW
are defined as the time at which
the outputs achieve the open circuit condition and are
not referenced to output voltage levels.
2. If CE#, LB#, or UB# goes low at the same time or before
WE# goes high, the outputs will remain at high impedance.
3. If CE#, LB#, or UB# goes low at the same time or after WE#
goes low, the outputs will remain at high impedance.
Addresses
A2 to A0
Addresses
A20 to A3
CE#1s
CE2s
OE#
WE#
LB#, UB#
D
OUT
DQ15 to DQ0
t
PM
t
RC
t
PC
t
PC
t
BA
t
OE
t
BE
t
COE
t
AA
t
OD
t
CO
t
BD
t
ACC
t
OEE
t
PC
D
OUT
D
OUT
D
OUT
D
OUT
t
AA
t
AA
t
ODO
t
OH
t
AOH
t
AOH
t
AOH
Fixed High
Maximum 8 words
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