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參數(shù)資料
| 型號： | AM50DL128CG70IT |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 存儲器 |
| 英文描述： | 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories and 64 Mbit (4 M x 16-Bit) Pseudo Static RAM |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA88 |
| 封裝： | 11.60 X 8 MM, FBGA-88 |
| 文件頁數(shù)： | 47/63頁 |
| 文件大?。?/td> | 464K |
| 代理商： | AM50DL128CG70IT |
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46
Am50DL128CG
November 7, 2002
P R E L I M I N A R Y
FLASH AC CHARACTERISTICS
OE#
WE#
Addresses
t
OH
Data
Valid
In
Valid
In
Valid PA
Valid RA
t
WC
t
WPH
t
AH
t
WP
t
DS
t
DH
t
RC
t
CE
Valid
Out
t
OE
t
ACC
t
OEH
t
GHWL
t
DF
Valid
In
CE#f Controlled Write Cycles
WE# Controlled Write Cycle
Valid PA
Valid PA
t
CP
t
CPH
t
WC
t
WC
Read Cycle
t
SR/W
CE#f
Note:
CE#f refers to active flash device being addressed (either CE#f1 or CE#f2). The chip enable input of the inactive flash
device must be held high during this operation.
Figure 20.
Back-to-back Read/Write Cycle Timings
WE#
CE#f
OE#
High Z
t
OE
High Z
DQ7
DQ6–DQ0
RY/BY#
t
BUSY
Complement
True
Addresses
VA
t
OEH
t
CE
t
CH
t
OH
t
DF
VA
VA
Status Data
Complement
Status Data
True
Valid Data
Valid Data
t
ACC
t
RC
Notes:
1. VA = Valid address. Illustration shows first status cycle after command sequence, last status read cycle, and array data read
cycle.
2. CE#f refers to active flash device being addressed (either CE#f1 or CE#f2). The chip enable input of the inactive flash
device must be held high during this operation.
Figure 21.
Data# Polling Timings (During Embedded Algorithms)
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| AM50DL128CG85IS | 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories and 64 Mbit (4 M x 16-Bit) Pseudo Static RAM |
| AM50DL128CG85IT | 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories and 64 Mbit (4 M x 16-Bit) Pseudo Static RAM |
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| Am50DL128BG85I | Circular Connector; No. of Contacts:128; Series:MS27505; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:25; Circular Contact Gender:Socket; Circular Shell Style:Box Mount Receptacle RoHS Compliant: No |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AM50DL128CG85IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM50DL128CG85IT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM50DL128CH | 制造商:未知廠家 制造商全稱:未知廠家 功能描述:Am50DL128CH - Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM50DL128CH_04 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Two Am29DL640G 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories |
| AM50DL128CH56IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Two Am29DL640G 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories |
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