參數(shù)資料
型號: AM50DL128CG70IS
廠商: ADVANCED MICRO DEVICES INC
元件分類: 存儲器
英文描述: 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories and 64 Mbit (4 M x 16-Bit) Pseudo Static RAM
中文描述: SPECIALTY MEMORY CIRCUIT, PBGA88
封裝: 11.60 X 8 MM, FBGA-88
文件頁數(shù): 60/63頁
文件大?。?/td> 464K
代理商: AM50DL128CG70IS
November 7, 2002
Am50DL128CG
59
P R E L I M I N A R Y
pSRAM ADDRESS SKEW
Figure 34.
Read Address Skew
Note:
If multiple invalid address cycles shorter than t
RC
min occur for a period greater than 10 μs, at least one valid address
cycle over t
RC min
is required during that period.
Figure 35.
Write Address Skew
Note:
If multiple invalid address cycles shorter than t
WC
min occur for a period greater than 10 μs, at least one valid address
cycle over t
WC min
, in addition to t
WP min
, is required during that period.
CE#1
WE#
Address
t
RC min
over 10
μ
s
CE#1
WE#
Address
t
WP min
t
WC min
over 10
μ
s
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