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參數(shù)資料
| 型號(hào)： | AM50DL128CG70IS |
| 廠商： | ADVANCED MICRO DEVICES INC |
| 元件分類： | 存儲(chǔ)器 |
| 英文描述： | 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories and 64 Mbit (4 M x 16-Bit) Pseudo Static RAM |
| 中文描述： | SPECIALTY MEMORY CIRCUIT, PBGA88 |
| 封裝： | 11.60 X 8 MM, FBGA-88 |
| 文件頁數(shù)： | 40/63頁 |
| 文件大小： | 464K |
| 代理商： | AM50DL128CG70IS |
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November 7, 2002
Am50DL128CG
39
P R E L I M I N A R Y
TEST CONDITIONS
Table 13.
Test Specifications
KEY TO SWITCHING WAVEFORMS
2.7 k
C
L
6.2 k
3.3 V
Device
Under
Test
Note:
Diodes are IN3064 or equivalent
Figure 12.
Test Setup
Test Condition
70, 85
Unit
Output Load
1 TTL gate
Output Load Capacitance, C
L
(including jig capacitance)
30
pF
Input Rise and Fall Times
5
ns
Input Pulse Levels
0.0–3.0
V
Input timing measurement
reference levels
1.5
V
Output timing measurement
reference levels
1.5
V
KS000010-PAL
WAVEFORM
INPUTS
OUTPUTS
Steady
Changing from H to L
Changing from L to H
Don’t Care, Any Change Permitted
Changing, State Unknown
Does Not Apply
Center Line is High Impedance State (High Z)
3.0 V
0.0 V
1.5 V
1.5 V
Output
Measurement Level
Input
Figure 13.
Input Waveforms and Measurement Levels
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