參數(shù)資料
型號: AM50DL128BH85IT
廠商: Advanced Micro Devices, Inc.
英文描述: CA-BAYONET
中文描述: 堆疊式多芯片封裝(MCP)閃存和SRAM
文件頁數(shù): 49/68頁
文件大?。?/td> 959K
代理商: AM50DL128BH85IT
October 7, 2003
Am50DL128BH
47
A D V A N C E I N F O R M A T I O N
FLASH AC CHARACTERISTICS
OE#
WE#
CE#f
V
CC
f
Data
Addresses
t
DS
t
AH
t
DH
t
WP
PD
t
WHWH1
t
WC
t
AS
t
WPH
t
VCS
555h
PA
PA
Read Status Data (last two cycles)
A0h
t
GHWL
t
CS
Status
D
OUT
Program Command Sequence (last two cycles)
RY/BY#
t
RB
t
BUSY
t
CH
PA
Notes:
1. PA = program address, PD = program data, D
OUT
is the true data at the program address.
2. Illustration shows device in word mode.
Figure 19.
Program Operation Timings
WP#/ACC
t
VHH
V
HH
V
IL
or V
IH
V
IL
or V
IH
t
VHH
Figure 20.
Accelerated Program Timing Diagram
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