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參數(shù)資料
| 型號： | AM50DL128BH70IT |
| 廠商： | Advanced Micro Devices, Inc. |
| 元件分類： | SRAM |
| 英文描述： | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| 中文描述： | 堆疊式多芯片封裝（MCP）閃存和SRAM |
| 文件頁數(shù)： | 26/68頁 |
| 文件大?。?/td> | 959K |
| 代理商： | AM50DL128BH70IT |
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24
Am50DL128BH
October 7, 2003
A D V A N C E I N F O R M A T I O N
Table 8.
CFI Query Identification String
Table 9.
System Interface String
Addresses
(Word Mode)
Addresses
(Byte Mode)
Data
Description
10h
11h
12h
20h
22h
24h
0051h
0052h
0059h
Query Unique ASCII string “QRY”
13h
14h
26h
28h
0002h
0000h
Primary OEM Command Set
15h
16h
2Ah
2Ch
0040h
0000h
Address for Primary Extended Table
17h
18h
2Eh
30h
0000h
0000h
Alternate OEM Command Set (00h = none exists)
19h
1Ah
32h
34h
0000h
0000h
Address for Alternate OEM Extended Table (00h = none exists)
Addresses
(Word Mode)
Addresses
(Byte Mode)
Data
Description
1Bh
36h
0027h
V
CC
Min. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
1Ch
38h
0036h
V
CC
Max. (write/erase)
D7–D4: volt, D3–D0: 100 millivolt
1Dh
3Ah
0000h
V
PP
Min. voltage (00h = no V
PP
pin present)
1Eh
3Ch
0000h
V
PP
Max. voltage (00h = no V
PP
pin present)
1Fh
3Eh
0003h
Typical timeout per single byte/word write 2
N
μs
20h
40h
0000h
Typical timeout for Min. size buffer write 2
N
μ
s (00h = not supported)
21h
42h
0009h
Typical timeout per individual block erase 2
N
ms
22h
44h
0000h
Typical timeout for full chip erase 2
N
ms (00h = not supported)
23h
46h
0005h
Max. timeout for byte/word write 2
N
times typical
24h
48h
0000h
Max. timeout for buffer write 2
N
times typical
25h
4Ah
0004h
Max. timeout per individual block erase 2
N
times typical
26h
4Ch
0000h
Max. timeout for full chip erase 2
N
times typical (00h = not supported)
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM50DL128BH85I | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM50DL128BH85IS | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM50DL128CG70IS | 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories and 64 Mbit (4 M x 16-Bit) Pseudo Static RAM |
| AM50DL128CG70IT | 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories and 64 Mbit (4 M x 16-Bit) Pseudo Static RAM |
| AM50DL128CG85IS | 64 Megabit (4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories and 64 Mbit (4 M x 16-Bit) Pseudo Static RAM |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM50DL128BH85I | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM50DL128BH85IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Two Am29DL640G 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories |
| AM50DL128BH85IT | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Two Am29DL640G 64 Megabit (8 M x 8-Bit/4 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memories |
| AM50DL128CG | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
| AM50DL128CG70IS | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM |
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