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參數(shù)資料
| 型號(hào)： | AM49DL322BGT85 |
| 廠商： | Spansion Inc. |
| 英文描述： | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous |
| 中文描述： | 堆疊式多芯片封裝（MCP）閃存和SRAM的32兆位（4個(gè)M × 8位/ 2米x 16位），3.0伏的CMOS只，同時(shí) |
| 文件頁數(shù)： | 11/64頁 |
| 文件大?。?/td> | 570K |
| 代理商： | AM49DL322BGT85 |
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10
Am49DL32xBG
July 19, 2002
P R E L I M I N A R Y
MCP DEVICE BUS OPERATIONS
This section describes the requirements and use of
the device bus operations, which are initiated through
the internal command register. The command register
itself does not occupy any addressable memory loca-
tion. The register is a latch used to store the com-
mands, along with the address and data information
needed to execute the command. The contents of the
register serve as inputs to the internal state machine.
The state machine outputs dictate the function of the
device. Tables 1-2 lists the device bus operations, the
inputs and control levels they require, and the result-
ing output. The following subsections describe each of
these operations in further detail.
Table 1.
Device Bus Operations
—
Flash Word Mode, CIOf = V
IH
Legend:
L = Logic Low = V
, H = Logic High = V
, V
= 11.5–12.5
V, V
= 9.0 ± 0.5 V, X = Don’t Care, SA = pSRAM Address Input, Byte Mode,
SADD = Flash Sector Address, A
IN
= Address In, D
IN
= Data In, D
OUT
= Data Out
Notes:
1.
Other operations except for those indicated in this column are
inhibited.
Do not apply CE#f = V
IL
, CE1#s = V
IL
and CE2s = V
IH
at the same
time.
Don’t care or open LB#s or UB#s.
If WP#/ACC = V
, the boot sectors will be protected. If WP#/ACC
= V
the boot sectors protection will be removed.
If WP#/ACC = V
ACC
(9V), the program time will be reduced by
40%.
2.
3.
4.
5.
The sector protect and sector unprotect functions may also be
implemented via programming equipment. See the “Autoselect
Mode” section.
If WP#/ACC = V
, the two outermost boot sectors remain
protected. If WP#/ACC = V
, the two outermost boot sector
protection depends on whether they were last protected or
unprotected using the method described in “Autoselect Mode”. If
WP#/ACC = V
HH,
all sectors will be unprotected.
Data will be retained in pSRAM.
6.
7.
8.
Data will be lost in pSRAM.
Operation
(Notes 1, 2)
CE#f
CE1#s
CE2s
OE#
WE#
Address
LB#s
UB#s RESET#
WP#/ACC
(Note 4)
DQ7
–
DQ0
DQ15
–
DQ8
Read from
Flash
(Note 7)
L
H
H
L
H
A
IN
X
X
H
L/H
D
OUT
D
OUT
(Note 8)
H
L
Write to Flash
(Note 7)
L
H
H
H
L
A
IN
X
X
H
(Note 4)
D
IN
D
IN
(Note 8)
H
L
Standby
CC
±
0.3 V
H
H
X
X
X
X
X
V
CC
±
0.3 V
H
High-Z
High-Z
Deep Power-down
Standby
V
CC
±
0.3 V
H
L
X
X
X
X
X
V
CC
±
0.3 V
H
High-Z
High-Z
Output Disable
L
L
H
H
H
X
X
X
H
L/H
High-Z
High-Z
H
H
X
X
X
Flash Hardware
Reset
(Note 7)
X
H
H
X
X
X
X
X
L
L/H
High-Z
High-Z
(Note 8)
H
L
Sector Protect
(Note 5)
(Note 7)
L
H
H
H
L
SADD, A6 = L,
A1 = H, A0 = L
X
X
V
ID
L/H
D
IN
X
(Note 8)
H
L
Sector
Unprotect
(Note 5)
(Note 7)
L
H
H
H
L
SADD, A6 = H,
A1 = H, A0 = L
X
X
V
ID
(Note 6)
D
IN
X
(Note 8)
H
L
Temporary
Sector
Unprotect
(Note 7)
X
H
H
X
X
X
X
X
V
ID
(Note 6)
D
IN
High-Z
(Note 8)
H
L
Read from pSRAM
H
L
H
L
H
A
IN
L
L
H
X
D
OUT
D
OUT
H
L
High-Z
D
OUT
L
H
D
OUT
High-Z
Write to pSRAM
H
L
H
X
L
A
IN
L
L
H
X
D
IN
D
IN
H
L
High-Z
D
IN
L
H
D
IN
High-Z
相關(guān)PDF資料 |
PDF描述 |
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| AM49DL323BGB70 | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous |
| AM49DL323BGB85 | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous |
| AM49DL323BGT70 | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous |
| AM49DL323BGT85 | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous |
| AM49DL324BGB70 | Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM49DL322BGT85S | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2M x 16-Bit) |
| AM49DL322BGT85T | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2M x 16-Bit) |
| AM49DL323BGB70 | 制造商:SPANSION 制造商全稱:SPANSION 功能描述:Stacked Multi-Chip Package (MCP) Flash Memory and SRAM 32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous |
| AM49DL323BGB70S | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2M x 16-Bit) |
| AM49DL323BGB70T | 制造商:AMD 制造商全稱:Advanced Micro Devices 功能描述:32 Megabit (4 M x 8-Bit/2 M x 16-Bit) CMOS 3.0 Volt-only, Simultaneous Operation Flash Memory and 32 Mbit (2M x 16-Bit) |
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