參數(shù)資料
型號: AM41PDS3228D
英文描述: 150NS, CERDIP, 883C; LEV B COMPLIANT(EEPROM)
中文描述: 32兆位(2米× 16位)的CMOS電壓1.8只。同時采取行動,頁面模式閃存和8兆位(1 M中的x 8-Bit/512畝x 16位),靜態(tài)存儲器(初步)
文件頁數(shù): 49/59頁
文件大小: 1068K
代理商: AM41PDS3228D
48
Am41PDS3224D
May 13, 2002
P R E L I M I N A R Y
FLASH AC CHARACTERISTICS
Alternate CE#f Controlled Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the “Flash Erase And Programming Performance” section for more information.
Parameter
Speed Options
Unit
JEDEC
Std
Description
10
11
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
100
110
ns
t
AVWL
t
AS
Address Setup Time (WE# to Address)
Min
0
ns
t
ASO
Address Setup Time to CE#f Low During Toggle
Bit Polling
Min
15
ns
t
ELAX
t
AH
Address Hold Time
Min
60
ns
t
AHT
Address Hold time from CE#f or OE# High During
Toggle Bit Polling
Min
0
ns
t
DVEH
t
DS
Data Setup Time
Min
60
ns
t
EHDX
t
DH
Data Hold Time
Min
0
ns
t
GHEL
t
GHEL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
t
WLEL
t
WS
WE# Setup Time
Min
0
ns
t
EHWH
t
WH
WE# Hold Time
Min
0
ns
t
ELEH
t
CP
CE#f Pulse Width
Min
60
ns
t
EHEL
t
CPH
CE#f Pulse Width High
Min
60
ns
t
WHWH1
t
WHWH1
Programming Operation (Note 2)
Typ
16
μs
t
WHWH1
t
WHWH1
Accelerated Programming Operation,
Word or Byte (Note 2)
Typ
5
μs
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2)
Typ
1
sec
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