參數(shù)資料
型號: AM41PDS3228D
英文描述: 150NS, CERDIP, 883C; LEV B COMPLIANT(EEPROM)
中文描述: 32兆位(2米× 16位)的CMOS電壓1.8只。同時采取行動,頁面模式閃存和8兆位(1 M中的x 8-Bit/512畝x 16位),靜態(tài)存儲器(初步)
文件頁數(shù): 46/59頁
文件大?。?/td> 1068K
代理商: AM41PDS3228D
May 13, 2002
Am41PDS3224D
45
P R E L I M I N A R Y
FLASH AC CHARACTERISTICS
OE#
WE#
Addresses
t
OEH
t
DH
t
AHT
t
ASO
t
OEPH
t
OE
Valid Data
(first read)
(second read)
(stops toggling)
t
CEPH
t
AHT
t
AS
DQ6/DQ2
Valid Data
Valid
Status
Valid
Status
Valid
Status
RY/BY#
CE#f
Note:
VA = Valid address; not required for DQ6. Illustration shows first two status cycle after command sequence, last status
read cycle, and array data read cycle
Figure 23.
Toggle Bit Timings (During Embedded Algorithms)
Note:
DQ2 toggles only when read at an address within an erase-suspended sector. The system may use OE# or CE#f to
toggle DQ2 and DQ6.
Figure 24.
DQ2 vs. DQ6
Enter
Erase
Erase
Resume
Erase
Enter Erase
Suspend Program
Erase Suspend
Read
Erase Suspend
Read
Erase
Suspend
Program
WE#
DQ6
DQ2
Erase
Complete
Erase
Suspend
Embedded
Erasing
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AM42-0041 Amplifier. Other
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