參數(shù)資料
型號: AM41DL32X8G
英文描述: 200NS, LCC, IND TEMP(EEPROM)
中文描述: Am41DL32x8G -堆疊式多芯片封裝(MCP)閃存和SRAM
文件頁數(shù): 43/63頁
文件大?。?/td> 1052K
代理商: AM41DL32X8G
42
Am41DL16x4D
P R E L I M I N A R Y
AC CHARACTERISTICS
Flash Read-Only Operations
Notes:
1. Not 100% tested.
2. See Figure 11 and Table 21 for test specifications.
Parameter
Description
Test Setup
Speed Options
Unit
JEDEC
Std
70
85
t
AVAV
t
RC
Read Cycle Time (Note 1)
Min
70
85
ns
t
AVQV
t
ACC
Address to Output Delay
CE#f, OE# = V
IL
Max
70
85
ns
t
ELQV
t
CE
Chip Enable to Output Delay
OE# = V
IL
Max
70
85
ns
t
GLQV
t
OE
Output Enable to Output Delay
Max
30
35
ns
t
EHQZ
t
DF
Chip Enable to Output High Z (Note 1)
Max
16
ns
t
GHQZ
t
DF
Output Enable to Output High Z (Note 1)
Max
16
ns
t
AXQX
t
OH
Output Hold Time From Addresses, CE#f or
OE#, Whichever Occurs First
Min
0
ns
t
OEH
Output Enable Hold
Time (Note 1)
Read
Min
0
ns
Toggle and
Data# Polling
Min
10
ns
t
OH
t
CE
Outputs
WE#
Addresses
CE#f
OE#
HIGH Z
Output Valid
HIGH Z
Addresses Stable
t
ACC
t
RC
t
OEH
t
RH
t
OE
t
RH
0 V
RY/BY#
RESET#
t
DF
Figure 14.
Read Operation Timings
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