- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄298821 > AM29LV320DB120EE (SPANSION LLC) 2M X 16 FLASH 3V PROM, 120 ns, PDSO48 PDF資料下載
參數(shù)資料
| 型號： | AM29LV320DB120EE |
| 廠商： | SPANSION LLC |
| 元件分類： | PROM |
| 英文描述： | 2M X 16 FLASH 3V PROM, 120 ns, PDSO48 |
| 封裝： | TSOP-48 |
| 文件頁數(shù)： | 3/53頁 |
| 文件大小： | 1008K |
| 代理商： | AM29LV320DB120EE |
第1頁第2頁當(dāng)前第3頁第4頁第5頁第6頁第7頁第8頁第9頁第10頁第11頁第12頁第13頁第14頁第15頁第16頁第17頁第18頁第19頁第20頁第21頁第22頁第23頁第24頁第25頁第26頁第27頁第28頁第29頁第30頁第31頁第32頁第33頁第34頁第35頁第36頁第37頁第38頁第39頁第40頁第41頁第42頁第43頁第44頁第45頁第46頁第47頁第48頁第49頁第50頁第51頁第52頁第53頁
July 30, 2002
Am29LV320D
11
RESET#: Hardware Reset Pin
The RESET# pin provides a hardware method of re-
setting the device to reading array data. When the RE-
SET# pin is driven low for at least a period of t
RP, the
device immediately terminates any operation in
progress, tristates all output pins, and ignores all
read/write commands for the duration of the RESET#
pulse. The device also resets the internal state ma-
chine to reading array data. The operation that was in-
terrupted should be reinitiated once the device is
ready to accept another command sequence, to en-
sure data integrity.
Current is reduced for the duration of the RESET#
pulse. When RESET# is held at V
SS±0.3 V, the device
draws CMOS standby current (I
CC4). If RESET# is held
at V
IL but not within VSS±0.3 V, the standby current will
be greater.
The RESET# pin may be tied to the system reset cir-
cuitry. A system reset would thus also reset the Flash
memory, enabling the system to read the boot-up firm-
ware from the Flash memory.
If RESET# is asserted during a program or erase op-
eration, the RY/BY# pin remains a “0” (busy) until the
internal reset operation is complete, which requires a
time of t
READY (during Embedded Algorithms). The
sys tem can thus monitor RY/BY # to det ermine
whether the reset operation is complete. If RESET# is
asserted when a program or erase operation is not ex-
ecuting (RY/BY# pin is “1”), the reset operation is com-
pleted within a time of t
READY (not during Embedded
Algorithms). The system can read data t
RH after the
RESET# pin returns to V
IH.
Refer to the AC Characteristics tables for RESET# pa-
rameters and to Figure 15 for the timing diagram.
Output Disable Mode
When the OE# input is at V
IH, output from the device is
disabled. The output pins are placed in the high
impedance state.
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AM29LV320DB120WME | 2M X 16 FLASH 3V PROM, 120 ns, PBGA48 |
| AM29LV640MH101EF | 4M X 16 FLASH 3V PROM, 100 ns, PDSO56 |
| AM2D-11G | ACTIVE DELAY LINE, TRUE OUTPUT, PDSO8 |
| AI4D-4J | ACTIVE DELAY LINE, TRUE OUTPUT, PDSO14 |
| AM3D-11J | ACTIVE DELAY LINE, TRUE OUTPUT, PDSO8 |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AM29LV320DB120EI | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 32M-Bit 4M x 8/2M x 16 120ns 48-Pin TSOP |
| AM29LV320DB120WMI | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 32M-Bit 4M x 8/2M x 16 120ns 48-Pin FBGA |
| AM29LV320DB90EC | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 32M-Bit 4M x 8/2M x 16 90ns 48-Pin TSOP |
| AM29LV320DB90ED | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 32M-Bit 4M x 8/2M x 16 90ns 48-Pin TSOP |
| AM29LV320DB90EF | 制造商:Spansion 功能描述:Flash Mem Parallel 3V/3.3V 32M-Bit 4M x 8/2M x 16 90ns 48-Pin TSOP |
發(fā)布緊急采購，3分鐘左右您將得到回復(fù)。