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參數(shù)資料
| 型號(hào)： | AM29LV128ML93FI |
| 廠商： | Advanced Micro Devices, Inc. |
| 英文描述： | 128 Megabit (8 M x 16-Bit/16 M x 8-Bit) MirrorBit⑩ 3.0 Volt-only Uniform Sector Flash Memory with VersatileI/O Control |
| 中文描述： | 128兆位（8 M中的x 16-Bit/16 M中的x 8位）的MirrorBit⑩3.0伏特，只有統(tǒng)一部門閃存與VersatileI內(nèi)存/ O控制 |
| 文件頁數(shù)： | 57/65頁 |
| 文件大小： | 1222K |
| 代理商： | AM29LV128ML93FI |
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September 9, 2003
Am29LV128MH/L
55
D A T A S H E E T
AC CHARACTERISTICS
Alternate CE# Controlled Erase and Program Operations
Notes:
1. Not 100% tested.
2. See the “Erase And Programming Performance” section for more information.
3. For 1–16 words/1–32 bytes programmed.
4. Effective write buffer specification is based upon a 16-word/32-byte write buffer operation.
5. Byte/Word programming specification is based upon a single word/byte programming operation not utilizing the write buffer.
6. AC Specifications listed are tested with V
IO
= V
CC
. Contact AMD for information on AC operation with V
IO
≠
V
CC
.
Parameter
Speed Options
JEDEC
Std.
Description
93R
103, 103R
113, 113R 123, 123R
Unit
t
AVAV
t
WC
Write Cycle Time (Note 1)
Min
90
100
110
120
ns
t
AVWL
t
AS
Address Setup Time
Min
0
ns
t
ELAX
t
AH
Address Hold Time
Min
45
ns
t
DVEH
t
DS
Data Setup Time
Min
45
ns
t
EHDX
t
DH
Data Hold Time
Min
0
ns
t
GHEL
t
GHEL
Read Recovery Time Before Write
(OE# High to WE# Low)
Min
0
ns
t
WLEL
t
WS
WE# Setup Time
Min
0
ns
t
EHWH
t
WH
WE# Hold Time
Min
0
ns
t
ELEH
t
CP
CE# Pulse Width
Min
45
ns
t
EHEL
t
CPH
CE# Pulse Width High
Min
30
ns
t
WHWH1
t
WHWH1
Write Buffer Program Operation (Notes 2, 3)
Typ
240
μs
Effective Write Buffer Program Operation
(Notes 2, 4)
Per Byte
Typ
7.5
μs
Per Word
Typ
15
μs
Accelerated Effective Write Buffer Program
Operation (Notes 2, 4)
Per Byte
Typ
6.25
μs
Per Word
Typ
12.5
μs
Single Byte Word
Program Operation (Note 2, 5)
Byte
Typ
60
μs
Word
Typ
60
μs
Accelerated Single Byte Word
Programming Operation (Note 2, 5)
Byte
Typ
54
μs
Word
Typ
54
μs
t
WHWH2
t
WHWH2
Sector Erase Operation (Note 2)
Typ
0.5
sec
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