參數(shù)資料
型號(hào): AGLE600V5-FFGG484C
元件分類: FPGA
英文描述: FPGA, 13824 CLBS, 600000 GATES, PBGA484
封裝: 23 X 23 MM, 2.23 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, FBGA-484
文件頁數(shù): 137/156頁
文件大?。?/td> 5023K
代理商: AGLE600V5-FFGG484C
IGLOOe DC and Switching Characteristics
Ad vance v0.3
2-67
I/O Register Specifications
Fully Registered I/O Buffers with Synchronous Enable and Asynchronous
Preset
Figure 2-26 Timing Model of Registered I/O Buffers with Synchronous Enable and Asynchronous Preset
INBUF
TRIBUF
CLKBUF
INBUF
CLKBUF
Data Input I/O Register with:
Active High Enable
Active High Preset
Positive-Edge Triggered
Data Output Register and
Enable Output Register with:
Active High Enable
Active High Preset
Postive-Edge Triggered
Pad
Out
CLK
Enable
Preset
Data_out
Data
EOUT
DOUT
Enable
CLK
DQ
DFN1E1P1
PRE
DQ
DFN1E1P1
PRE
DQ
DFN1E1P1
PRE
D_Enable
A
B
C
D
E
F
G
H
I
J
L
K
Y
Core
Array
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