參數(shù)資料
型號: AGLE600V5-FFGG484C
元件分類: FPGA
英文描述: FPGA, 13824 CLBS, 600000 GATES, PBGA484
封裝: 23 X 23 MM, 2.23 MM HEIGHT, 1 MM PITCH, ROHS COMPLIANT, FBGA-484
文件頁數(shù): 133/156頁
文件大小: 5023K
代理商: AGLE600V5-FFGG484C
IGLOOe DC and Switching Characteristics
2- 64
Advance v0.3
Timing Characteristics
1.5 V DC Core Voltage
1.2 V DC Core Voltage
Table 2-105 Minimum and Maximum DC Input and Output Levels
DC Parameter
Description
Min.
Typ.
Max.
Units
VCCI
Supply Voltage
2.375
2.5
2.625
V
VOL
Output LOW Voltage
0.9
1.075
1.25
V
VOH
Output HIGH Voltage
1.25
1.425
1.6
V
IOL
4
Output Lower Current
0.65
0.91
1.16
mA
IOH
4
Output HIGH Current
0.65
0.91
1.16
mA
VI
Input Voltage
0
2.925
V
IIH
3
Input HIGH Leakage Current
10
A
IIL
3
Input LOW Leakage Current
10
A
VODIFF
Differential Output Voltage
250
350
450
mV
VOCM
Output Common-Mode Voltage
1.125
1.25
1.375
V
VICM
Input Common-Mode Voltage
0.05
1.25
2.35
V
VIDIFF
Input Differential Voltage
100
350
mV
Notes:
1. ± 5%
2. Differential input voltage = ±350 mV
3. Currents are measured at 85°C junction temperature.
4. IOL/IOH is defined by VODIFF/(resistor network).
Table 2-106 AC Waveforms, Measuring Points, and Capacitive Loads
Input LOW (V)
Input HIGH (V)
Measuring Point* (V)
VREF (typ.) (V)
1.075
1.325
Cross point
* Measuring point = Vtrip. See Table 2-22 on page 2-22 for a complete table of trip points.
Table 2-107 LVDS – Applies to 1.5 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.425 V, Worst-Case VCCI = 2.3 V
Speed Grade
tDOUT
tDP
tDIN
tPY
Units
Std.
0.98
1.77
0.19
1.62
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-6 on page 2-6 for derating
values.
Table 2-108 LVDS – Applies to 1.2 V DC Core Voltage
Commercial-Case Conditions: TJ = 70°C, Worst-Case VCC = 1.14 V, Worst-Case VCCI = 2.3 V
Speed Grade
tDOUT
tDP
tDIN
tPY
Units
Std.
1.55
2.19
0.26
1.88
ns
Note: For specific junction temperature and voltage supply levels, refer to Table 2-7 on page 2-6 for derating
values.
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