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參數(shù)資料
| 型號(hào)： | AFE8201PFBT |
| 英文描述： | IF Analog-to-Digital Converter with Digital Downconverter |
| 中文描述： | 中頻模擬到數(shù)字轉(zhuǎn)換器與數(shù)字下變頻器 |
| 文件頁數(shù)： | 16/20頁 |
| 文件大?。?/td> | 220K |
| 代理商： | AFE8201PFBT |
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SBWS016A OCTOBER 2003 REVISED JANUARY 2005
www.ti.com
16
SECOND FIR FILTER
The second FIR filter, shown in Figure 18, is similar to the first FIR filter with three notable exceptions. First, the depth
of the coefficient and data memories are doubled to 128. This allows for filters up to 126 taps to be realized without
running out of data memory. It also allows longer sets of filter coefficients to be stored in coefficient memory. Note
that BASE_ADDR and NCOEFF are each one bit wider in the control register.
0
0
1
0
0
NCOEFF_A
BASE_ADDR_A
MODE_A
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Register Address
0
0
1
0
0
NCOEFF_B
BASE_ADDR_B
MODE_B
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Register Address
0
0
1
0
1
SHIFT_B
M2X
Don’t Care
SHIFT_A
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Register Address
Figure 18. Second FIR Filter Control Register
Second, because of the additional decimation by two from the first FIR filter, twice as many MCLK cycles are available
to process coefficients, increasing the maximum allowable value of NCOEFF to:
NCOEFF
4
DEC_RATE
4
Finally, a second coefficient memory and computational unit is added to allow the simultaneous implementation of
two filters with differing responses acting on the same input data stream. Coefficients for filter A are stored in memory
bank 1 (MEM = 1) and coefficients for filter B are stored in memory bank 2 (MEM = 2).
Note that while the coefficient values for filter A and filter B can be different, the two filters share the same values
for MODE, NCOEFF, and BASE_ADDR.
EXTENDED-LENGTH FILTER MODE
If FIR2A or FIR2B cannot provide enough filter taps to achieve the desired frequency response, setting control bit M2X will
put the two filters into an interleaved mode, which will double the length of filter which can be realized. The limitations are:
1.
only odd symmetrical filters may be realized;
2.
the filter length M must be such that (M + 1)/4 is an integer; and
3.
only one filter can be realized (in M2X mode the A and B outputs are identical: IB = IA and QB = QA).
In addition to setting the M2X bit, FIR2A must be set to EVEN mode and FIR2B must be set to ODD mode. NCOEFF_A
and NCOEFF_B are both set to (M+1)/4. SHIFT_A and SHIFT_B should be identical. There are no restrictions on
BASE_ADDR_A or BASE_ADDR_B.
The M-tap filter will have (M+1)/2 unique coefficients. The first, third, fifth, etc. coefficients are loaded into the FIR2A
coefficient memory; the second, fourth, sixth, etc. are loaded into the FIR2B memory. The center coefficient of the filter will
end up as the last coefficient loaded into FIR2B.
P
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