參數(shù)資料
型號: AFE8201
英文描述: IF Analog-to-Digital Converter with Digital Downconverter
中文描述: 中頻模擬到數(shù)字轉(zhuǎn)換器與數(shù)字下變頻器
文件頁數(shù): 17/20頁
文件大?。?/td> 220K
代理商: AFE8201
"#$%&'
SBWS016A OCTOBER 2003 REVISED JANUARY 2005
www.ti.com
17
AUXILIARY DAC
In normal operation the auxiliary DAC values are sent over the data interface through input pin DIN and framed by
DFSI. The auxiliary DAC control register, shown in Figure 19, allows the DAC value to be set through the control
interface as an alternative. A new DAC value through either interface will cause the DAC output to change, regardless
of which interface set the previous DAC value. Please note, however, that unpredictable results will occur if both
interfaces write to the DAC at the same time.
0
0
1
0
1
DAC_DATA
Don’t Care
1
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Register Address
Figure 19. Auxiliary DAC Control Register
PGA AND POWER-DOWN
The gain of PGA and the power-down mode can be set in register 12. The gain setting of the PGA is shown in Table 4.
Table 4. PGA Gain Setting
PGA Gain Range
1.00
1.14
1.33
3-Bit Code
(B4, B3, and B2)
000
100
010
1.60
2.00
2.67
110
001
101
4.00
011
Bit 0
PWD = 0 for normal operation.
PWD = 1 for power-down.
0
0
1
1
0
GAIN
Don’t Care
Don’t
Care
PWD
0
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
Register Address
Figure 20. PGA and PWD Register
P
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