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參數(shù)資料
| 型號： | AFE1224 |
| 英文描述： | 2Mbps, Single Pair ANALOG FRONT END |
| 中文描述： | 2Mbps的，單對模擬前端 |
| 文件頁數(shù)： | 1/11頁 |
| 文件大小： | 137K |
| 代理商： | AFE1224 |
AFE1224
2Mbps, Single Pair ANALOG FRONT END
FEATURES
G
E1/T1 SINGLE PAIR 2B1Q
G
PROGRAMMABLE POWER DISSIPATION
G
28-LEAD SSOP
G
64kbps TO 2320kbps OPERATION
DESCRIPTION
Burr-Brown’s Analog Front End minimizes the size
and cost of a single pair High bit rate Digital Sub-
scriber Line (HDSL) system by providing all of the
active analog circuitry needed to connect an HDSL
digital signal processor to an external compromise
hybrid and an HDSL line transformer. The transmit
and receive filter responses automatically change with
clock frequency, allowing the AFE1224 to operate
over a wide range of data rates. The power dissipation
of the device can be reduced under digital control for
operation at lower speeds. The AFE1224 will operate
at bit rates from 64kbps to 2.320Mbps.
1999 Burr-Brown Corporation
PDS-1548A
Printed in U.S.A. June, 1999
For most current data sheet and other product
information, visit www.burr-brown.com
International Airport Industrial Park Mailing Address: PO Box 11400, Tucson, AZ 85734 Street Address: 6730 S. Tucson Blvd., Tucson, AZ 85706 Tel: (520) 746-1111
Twx: 910-952-1111 Internet: http://www.burr-brown.com/ Cable: BBRCORP Telex: 066-6491 FAX: (520) 889-1510 Immediate Product Info: (800) 548-6132
G
SCALEABLE DATA RATE
G
PIN COMPATIBLE WITH AFE1124
G
COMPLETE ANALOG INTERFACE
G
–40
°
C TO +85
°
C OPERATION
Functionally, this unit consists of a transmit and a
receive section. The transmit section generates analog
signals from 2-bit digital symbol data and filters the
analog signals to create 2B1Q symbols. The on-board
differential line driver provides a 13.5dBm signal to
the telephone line. The receive section filters and
digitizes the symbol data received on the telephone
line. The AFE1224 operates on a single 5V supply.
The digital circuitry in the unit can be connected to a
supply from 3.3V to 5V. The chip uses only 355mW
for full-speed operation. It is housed in a 28-lead
SSOP package.
Σ
Modulator
Pulse Former
PGA
Difference
Amplifier
Patents Pending
AFE1224
Line Driver
txLINE
txLINE
rxHYB
rxHYB
rxLINE
rxLINE
tx and rx
Control
Registers
tx and rx
Interface
Lines
Decimation
Filter
AFE1224
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| AFE1224E | Circular Connector; No. of Contacts:18; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:15-18 RoHS Compliant: No |
| AFE1230 | G.SHDSL ANALOG FRONT-END |
| AFE1230E | G.SHDSL ANALOG FRONT-END |
| AFE1231K | G.SHDSL ANALOG FRONT-END |
| AFE1231KG4 | G.SHDSL ANALOG FRONT-END |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| AFE1224-2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AFE1224E | 功能描述:IC HDSL ANALOG FRONT END 28SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率（瓦特）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:帶卷 (TR) |
| AFE1224E/1K | 功能描述:IC HDSL ANALOG FRONT END 28SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率（瓦特）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:32-QFN（5x5） 包裝:帶卷 (TR) |
| AFE1224E-1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
| AFE1224E-2 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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