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參數(shù)資料
| 型號： | AFE1203E |
| 英文描述： | LJT 18C 18#20 PIN PLUG |
| 中文描述： | 2Mbps的，單對HDSL模擬前端 |
| 文件頁數(shù)： | 7/10頁 |
| 文件大?。?/td> | 193K |
| 代理商： | AFE1203E |
7
AFE1203
rxHYB
AND rxLINE INPUT ANTI-ALIASING FILTERS
The –3dB frequency of the input anti-aliasing filter for the
rxLINE and rxHYB differential inputs should be approxi-
mately 2MHz for operation at 2.3Mbps. Suggested values
for the filter are 375
for each of the two input resistors and
100pF for the capacitor. Together the two 375
resistors
and the 100pF capacitor result in –3dB frequency of just
over 2MHz. The 375
input resistors will result in a mini-
mal voltage divider loss with the input impedance of the
AFE1203.
This circuit applies at rates of 1Mbps to 2Mbps. For slower
rates, the anti-aliasing filters will give best performance with
their –3dB frequency approximately equal to the bit rate. For
example, a –3dB frequency of 500kHz should be used for a
single pair bit rate of 500kbps.
rxHYB AND rxLINE INPUT BIAS VOLTAGE
The transmitter output on the txLINE pins and the rxLINE
inputs are centered at midscale, 2.5V.
Inside the AFE1203, the rxHYB and rxLINE signals are
subtracted as described in the paragraph on echo cancella-
tion above. This means that the rxHYB inputs need to be
centered at 2.5V just as the rxLINE signal is centered at
2.5V. The external compromise hybrid must be designed so
that the signal into the rxHYB inputs remains centered at
2.5V.
FIGURE 2. Basic Connection Diagram.
PLL
OUT
REF
P
V
CM
REF
N
AFE1203E
DSP
PLL
IN
AGND
DGND
AGND
AGND
AGND
AGND
txLINE
P
txLINE
N
rxHYB
P
rxHYB
N
rxLINE
N
rxLINE
P
txDAT
P
txDAT
N
txCLK
rxSYNC
rxLOOP
rxGAIN1
rxGAIN0
rxD13 - rxD0
1k
200
0.1
μ
F
14
47nF
13
13
Neg
Pos
Neg
Pos
375
375
375
375
100pF
100pF
Compromise
Hybrid
47nF
Input anti-alias
filter f
C
2MHz
1:2 Transformer
Tip
Ring
0.1
μ
F
0.1
μ
F
0.1
μ
F
DV
DD
PLL
AV
DD
AV
DD
AV
DD
AV
DD
5V Analog
0.1
μ
F
0.1
μ
F
10
μ
F
0.1
μ
F
0.1
μ
F 0.1
μ
F
1 - 10
μ
F
+
100
μ
F
5V to 3.3V Digital
5
- 10
Resistor for Isolation
相關PDF資料 |
PDF描述 |
|---|---|
| AFE1205 | LJT 18C 18#20 PIN PLUG |
| AFE1205E | Circular Connector; No. of Contacts:18; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Pin; Circular Shell Style:Straight Plug; Insert Arrangement:15-18 RoHS Compliant: No |
| AFE1224 | 2Mbps, Single Pair ANALOG FRONT END |
| AFE1224E | Circular Connector; No. of Contacts:18; Series:MS27467; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:15; Circular Contact Gender:Socket; Circular Shell Style:Straight Plug; Insert Arrangement:15-18 RoHS Compliant: No |
| AFE1230 | G.SHDSL ANALOG FRONT-END |
相關代理商/技術參數(shù) |
參數(shù)描述 |
|---|---|
| AFE1203E/1K | 功能描述:電信線路管理 IC 2Mbps Sngl Pair HDSL Anlg Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| AFE1203E/1KG4 | 功能描述:電信線路管理 IC 2Mbps Sngl Pair HDSL Anlg Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| AFE1205 | 制造商:BB 制造商全稱:BB 功能描述:2Mbps, Single Pair HDSL ANALOG FRONT END |
| AFE1205E | 功能描述:電信線路管理 IC 2Mbps Sngl Pair HDSL Anlg Front End RoHS:否 制造商:STMicroelectronics 產(chǎn)品:PHY 接口類型:UART 電源電壓-最大:18 V 電源電壓-最小:8 V 電源電流:30 mA 最大工作溫度:+ 85 C 最小工作溫度:- 40 C 安裝風格:SMD/SMT 封裝 / 箱體:VFQFPN-48 封裝:Tray |
| AFE1205E/1K | 功能描述:IC HDSL ANALOG FRONT END 48SSOP RoHS:是 類別:集成電路 (IC) >> 數(shù)據(jù)采集 - 模擬前端 (AFE) 系列:- 產(chǎn)品培訓模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標準包裝:2,500 系列:- 位數(shù):- 通道數(shù):2 功率（瓦特）:- 電壓 - 電源，模擬:3 V ~ 3.6 V 電壓 - 電源，數(shù)字:3 V ~ 3.6 V 封裝/外殼:32-VFQFN 裸露焊盤 供應商設備封裝:32-QFN（5x5） 包裝:帶卷 (TR) |
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