參數(shù)資料
型號： ADZS-BF537-EZLITE
廠商： Analog Devices Inc
文件頁數(shù)： 32/68頁
文件大?。?/td> 0K
描述： BOARD EVAL ADSP-BF537
產(chǎn)品培訓(xùn)模塊： Interfacing AV Converters to Blackfin Processors
Blackfin® Processor Core Architecture Overview
Blackfin® Device Drivers
Blackfin® Optimizations for Performance and Power Consumption
Blackfin® System Services
Introduction to VisualDSP++® Tools
特色產(chǎn)品： Blackfin? BF50x Series Processors
標(biāo)準(zhǔn)包裝： 1
系列： Blackfin®
類型： DSP
適用于相關(guān)產(chǎn)品： ADSP-BF537
所含物品： 評估板、軟件和說明文檔
配用： ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARD
ADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE
ADZS-USBLAN-EZEXT-ND - BOARD DAUGHTER EXTENDED USB-LAN
ADZS-BFFPGA-EZEXT-ND - BOARD EVAL FPGA BLACKFIN EXTENDR
相關(guān)產(chǎn)品： ADSP-BF537KBCZ-6BV-ND - IC DSP CTLR 16BIT 208CSPBGA
ADSP-BF537BBCZ-5BV-ND - IC DSP CTLR 16BIT 208CSPBGA
ADSP-BF537KBCZ-6AV-ND - IC DSP CTLR 16BIT 182CSPBGA
ADSP-BF537BBCZ-5AV-ND - IC DSP CTLR 16BIT 182CSPBGA
ADSP-BF537BBCZ-5B-ND - IC DSP CTLR 16BIT 208CSPBGA
ADSP-BF537BBC-5A-ND - IC DSP CTLR 16BIT 182CSPBGA
Rev. J
|
Page 38 of 68
|
February 2014
Serial Port Timing
through Figure 23 on Page 41 describe serial port operations.
Table 30. Serial Ports—External Clock
Parameter
Min
Max
Unit
Timing Requirements
tSFSE
TFSx/RFSx Setup Before TSCLKx/RSCLKx1
3.0
ns
tHFSE
TFSx/RFSx Hold After TSCLKx/RSCLKx
1
3.0
ns
tSDRE
Receive Data Setup Before RSCLKx
1
3.0
ns
tHDRE
Receive Data Hold After RSCLKx
1
3.0
ns
tSCLKEW
TSCLKx/RSCLKx Width
4.5
ns
tSCLKE
TSCLKx/RSCLKx Period
15.0
ns
tSUDTE
Start-Up Delay From SPORT Enable To First External TFSx2
4.0 × tSCLKE
ns
tSUDRE
Start-Up Delay From SPORT Enable To First External RFSx
4.0 × tSCLKE
ns
Switching Characteristics
tDFSE
TFSx/RFSx Delay After TSCLKx/RSCLK (Internally Generated TFSx/RFSx)
3
10.0
ns
tHOFSE
TFSx/RFSx Hold After TSCLKx/RSCLK (Internally Generated TFSx/RFSx)2
0ns
tDDTE
Transmit Data Delay After TSCLKx2
10.0
ns
tHDTE
Transmit Data Hold After TSCLKx2
0ns
1 Referenced to sample edge.
2 Verified in design but untested. After being enabled, the serial port requires external clock pulses—before the first external frame sync edge—to initialize the serial port.
3 Referenced to drive edge.
Table 31. Serial Ports—Internal Clock
2.25 V
V
DDEXT < 2.70 V
or
0.80 V
V
DDINT < 0.95 V
1
2.70 V
V
DDEXT 3.60 V
and
0.95 V
V
DDINT 1.43 V
2, 3
Parameter
Min
Max
Min
Max
Unit
Timing Requirements
tSFSI
TFSx/RFSx Setup Before TSCLKx/RSCLKx4
8.5
8.0
ns
tHFSI
TFSx/RFSx Hold After TSCLKx/RSCLKx4
–1.5
ns
tSDRI
Receive Data Setup Before RSCLKx
8.5
8.0
ns
tHDRI
Receive Data Hold After RSCLKx
–1.5
ns
Switching Characteristics
tDFSI
TFSx/RFSx Delay After TSCLKx/RSCLKx (Internally Generated
TFSx/RFSx)
5
3.0
ns
tHOFSI
TFSx/RFSx Hold After TSCLKx/RSCLKx (Internally Generated
TFSx/RFSx)
1.0
ns
tDDTI
Transmit Data Delay After TSCLKx
3.0
ns
tHDTI
Transmit Data Hold After TSCLKx
1.0
ns
tSCLKIW
TSCLKx/RSCLKx Width
4.5
ns
1 Applies to all nonautomotive-grade devices when operated within either of these voltage ranges.
2 Applies to all nonautomotive-grade devices when operated within these voltage ranges.
3 All automotive-grade devices are within these specifications.
4 Referenced to sample edge.
5 Referenced to drive edge.
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ADZS-BF537-STAMP 功能描述:SYSTEM DEV FOR ADSP-BF537 RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 通用嵌入式開發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:Blackfin® 產(chǎn)品培訓(xùn)模塊:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色產(chǎn)品:Blackfin? BF50x Series Processors 標(biāo)準(zhǔn)包裝:1 系列:Blackfin® 類型:DSP 適用于相關(guān)產(chǎn)品:ADSP-BF548 所含物品:板，軟件，4x4 鍵盤，光學(xué)撥輪，QVGA 觸摸屏 LCD 和 40G 硬盤 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相關(guān)產(chǎn)品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA
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ADZS-BF538F-EZLITE 功能描述:BOARD EVAL FOR ADSP-BF538 RoHS:否 類別:編程器，開發(fā)系統(tǒng) >> 通用嵌入式開發(fā)板和套件（MCU、DSP、FPGA、CPLD等） 系列:Blackfin® 產(chǎn)品培訓(xùn)模塊:Blackfin® Processor Core Architecture Overview Blackfin® Device Drivers Blackfin® Optimizations for Performance and Power Consumption Blackfin® System Services 特色產(chǎn)品:Blackfin? BF50x Series Processors 標(biāo)準(zhǔn)包裝:1 系列:Blackfin® 類型:DSP 適用于相關(guān)產(chǎn)品:ADSP-BF548 所含物品:板，軟件，4x4 鍵盤，光學(xué)撥輪，QVGA 觸摸屏 LCD 和 40G 硬盤 配用:ADZS-BFBLUET-EZEXT-ND - EZ-EXTENDER DAUGHTERBOARDADZS-BFLLCD-EZEXT-ND - BOARD EXT LANDSCAP LCD INTERFACE 相關(guān)產(chǎn)品:ADSP-BF542BBCZ-4A-ND - IC DSP 16BIT 400MHZ 400CSBGAADSP-BF544MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF542KBCZ-6A-ND - IC DSP 16BIT 600MHZ 400CSBGAADSP-BF547MBBCZ-5M-ND - IC DSP 16BIT 533MHZ MDDR 400CBGAADSP-BF548BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF547BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF544BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGAADSP-BF542BBCZ-5A-ND - IC DSP 16BIT 533MHZ 400CSBGA
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