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參數(shù)資料
| 型號： | ADV7196A |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| 中文描述： | 多格式逐行掃描/高清晰度電視編碼器三種11位DAC，10位數(shù)據(jù)輸入，以及Macrovision |
| 文件頁數(shù)： | 16/36頁 |
| 文件大?。?/td> | 501K |
| 代理商： | ADV7196A |
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REV. 0
ADV7196A
VBI Open (MR14)
This bit enables or disables the facility of VBI data insertion during
the Vertical Blanking Interval.
For this purpose Lines 13 to 42 of each frame can be used for VBI
when SMPTE293M standard is used, or Lines 6 to 43 when
ITU-R.BT1358 standard is used
.
Undershoot Limiter (MR15–MR16)
This control limits the Y signal to a programmable level in the active
video region.
Available limit levels are –1.5 IRE, –6 IRE, –11 IRE.
Note that this facility is only available when Interpolation is enabled
(MR36 = “1”)
.
Sharpness Filter (MR17)
This control bit enables or disables the Sharpness Filter mode. This
bit must be set to “1” for any values programmed into the Filter
Gain 1 Register to take effect. It must also be set to “1” when
Adaptive Filter mode is used.
Refer to Sharpness Filter control and Adaptive Filter control section.
–
6IRE
100IRE
0IRE
–
40IRE
Figure 19. Undershoot Limiter, Programmed to –6 IRE
MODE REGISTER 1
MR1 (MR17–MR10)
(Address (SR4–SR0) = 01H)
Figure 20 shows the various operations under the control of Mode
Register 1.
MR1 BIT DESCRIPTION
Pixel Data Enable (MR10)
When this bit is set to “0,” the pixel data input to the ADV7196A
is blanked such that a black screen is output from the DACs. When
this bit is set to “1,” pixel data is accepted at the input pins and
the ADV7196A outputs the standard set in “Output Standard
Selection” (MR01–00). This bit must be set to “1” to enable out-
put of the test pattern signals.
Input Format (MR11)
It is possible to input data in 4:2:2 format or at 4:4:4 format at
27 MHz.
Test Pattern Enable (MR12)
Enables or disables the internal test pattern generator.
Test Pattern Hatch/Frame (MR13)
If this bit is set to “0,” a cross-hatch test pattern is output from the
ADV7196A (for example, in SMPTE293M 11 horizontal and 11
vertical white lines, four pixels wide are displayed against a black
background). The cross-hatch test pattern can be used to test
monitor convergence.
If this bit is set to “1,” a uniform colored frame/field test pattern
is output from the ADV7196A.
The color of the lines or the frame/field is by default white but can
be programmed to be any color using the Color Y, Color Cr,
Color Cb registers.
MR11
MR17
MR12
MR14
MR15
MR16
MR17
0
1
DISABLED
ENABLED
SHARPNESS
FILTER
MR13
MR10
MR14
0
1
DISABLED
ENABLED
VBI OPEN
MR12
0
1
DISABLED
ENABLED
TEST PATTERN
ENABLE
MR10
0
1
DISABLED
ENABLED
PIXEL DATA
ENABLE
MR16 MR15
0
0
1
1
0
1
0
1
DISABLED
–
11IRE
–
6IRE
–
1.5IRE
UNDERSHOOT
LIMITER
MR13
0
1
HATCH
FIELD/FRAME
TEST PATTERN
HATCH/FRAME
MR11
0
1
4:4:4 YCRCB
4:2:2 YCRCB
INPUT FORMAT
Figure 20. Mode Register 1
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADV7196AKS | Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| ADV7197 | Multiformat HDTV Encoder with Three 11-Bit DACs |
| ADV7197KST | Multiformat HDTV Encoder with Three 11-Bit DACs |
| ADV7304A | Multiformat SD, Progressive Scan/HDTV Video Encoder with Six NSV 14-Bit DACs |
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADV7196AKS | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat Progressive Scan/HDTV Encoder with Three 11-Bit DACs, 10-Bit Data Input, and Macrovision |
| ADV7197 | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat HDTV Encoder with Three 11-Bit DACs |
| ADV7197KS | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 11-Bit 52-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:MULTI-FORMAT HDTV ENCODER, 3 11-BIT DACS - Bulk |
| ADV7197KST | 制造商:AD 制造商全稱:Analog Devices 功能描述:Multiformat HDTV Encoder with Three 11-Bit DACs |
| ADV7197KSZ | 制造商:Analog Devices 功能描述:Video Encoder 3DAC 11-Bit 52-Pin MQFP 制造商:Rochester Electronics LLC 功能描述:MULTI-FORMAT HDTV ENCODER, 3 11-BIT DACS - Bulk |
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