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ADV7189B
Rev. B | Page 21 of 104
SYNC PROCESSING
The ADV7189B extracts syncs embedded in the video data
stream. There is currently no support for external HS/VS
inputs. The sync extraction has been optimized to support
imperfect video sources such as VCRs with head switches. The
actual algorithm used employs a coarse detection based on a
threshold crossing followed by a more detailed detection using
an adaptive interpolation algorithm. The raw sync information
is sent to a line-length measurement and prediction block. The
output of this is then used to drive the digital resampling
section to ensure that the ADV7189B outputs 720 active pixels
per line.
The sync processing on the ADV7189B also includes the
following specialized postprocessing blocks that filter and
condition the raw sync information retrieved from the
digitized analog video.
Vsync Processor. This block provides extra filtering of
the detected Vsyncs to give improved vertical lock.
Hsync Processor. The Hsync processor is designed to filter
incoming Hsyncs that are corrupted by noise, providing
much improved performance for video signals with stable
time base but poor SNR.
VBI DATA RECOVERY
The ADV7189B can retrieve the following information from
the input video:
Wide-screen signaling (WSS)
Copy generation management system (CGMS)
Closed captioning (CC)
Macrovision protection presence
EDTV data
Gemstar-compatible data slicing
The ADV7189B is also capable of automatically detecting
the incoming video standard with respect to
Color subcarrier frequency
Field rate
Line rate
The ADV7189B can configure itself to support PAL-BGHID,
PAL-M/N, PAL-combination N, NTSC-M, NTSC-J, SECAM
50 Hz/60 Hz, NTSC4.43, and PAL60.
GENERAL SETUP
Video Standard Selection
The VID_SEL[3:0] register allows the user to force the digital
core into a specific video standard. Under normal circumstances,
this should not be necessary. The VID_SEL[3:0] bits default to
an autodetection mode that supports PAL, NTSC, SECAM, and
variants thereof. The following section provides more informa-
tion on the autodetection system.
Autodetection of SD Modes
To guide the autodetect system of the ADV7189B, individ-
ual enable bits are provided for each of the supported video
standards. Setting the relevant bit to 0 inhibits the standard
from being detected automatically. Instead, the system picks
the closest of the remaining enabled standards. The results of
the autodetection can be read back via the status registers. See
the
168H
Global Status Registers section for more information.
VID_SEL[3:0] Address 0x00[7:4]
Table 18. VID_SEL Function
VID_SEL[3:0]
Description
0000 (default)
Autodetect (PAL BGHID) <–> NTSC J (no
pedestal), SECAM.
0001
Autodetect (PAL BGHID) <–> NTSC M
(pedestal), SECAM.
0010
Autodetect (PAL N) (pedestal) <–> NTSC J (no
pedestal), SECAM.
0011
Autodetect (PAL N) (pedestal) <–> NTSC M
(pedestal), SECAM.
0100
NTSC J (1).
0101
NTSC M (1).
0110
PAL 60.
0111
NTSC 4.43 (1).
1000
PAL BGHID.
1001
PAL N[= PAL BGHID (with pedestal)].
1010
PAL M (without pedestal).
1011
PAL M.
1100
PAL Combination N.
1101
PAL Combination N (with pedestal).
1110
SECAM.
1111
SECAM (with pedestal).
AD_SEC525_EN Enable Autodetection of SECAM 525
Line Video, Address 0x07[7]
Setting AD_SEC525_EN to 0 (default), disables the
autodetection of a 525-line system with a SECAM style,
FM-modulated color component.
Setting AD_SEC525_EN to 1 enables the detection.
AD_SECAM_EN Enable Autodetection of SECAM,
Address 0x07[6]
Setting AD_SECAM_EN to 0 disables the autodetection of
SECAM.
Setting AD_SECAM_EN to 1 (default) enables the detection.