參數(shù)資料
型號(hào)： ADV7180BCPZ
廠商： ANALOG DEVICES INC
元件分類(lèi)： 顏色信號(hào)轉(zhuǎn)換
英文描述： 10-Bit, 4 x Oversampling SDTV Video Decoder
中文描述： COLOR SIGNAL DECODER, QCC40
封裝： 6 X 6 MM, ROHS COMPLIANT, MO-220VJJD-2, LFCSP-40
文件頁(yè)數(shù)： 42/112頁(yè)
文件大?。?/td> 1320K
代理商： ADV7180BCPZ
ADV7180
BL_C_VBI, Blank Chroma During VBI, Address 0x04 [2]
Setting BL_C_VBI high, blanks the Cr and Cb values of all VBI
lines. This is done so any data that may arrive during VBI is not
decoded as color and is output through Cr and Cb. As a result,
it is possible to send VBI lines into the decoder, and then output
them through an encoder again, undistorted. Without this
blanking, any color that is incorrectly decoded would be
encoded by the video encoder, thus distorting the VBI lines.
Setting BL_C_VBI to 0 decodes and outputs color during VBI.
Setting BL_C_VBI to 1 (default) blanks Cr and Cb values
during VBI.
RANGE, Range Selection, Address 0x04 [0]
AV codes (as per ITU-R BT.656, formerly known as CCIR-656)
consist of a fixed header made up of 0xFF and 0x00 values.
These two values are reserved and therefore are not to be used
for active video. Additionally, the ITU specifies that the
nominal range for video should be restricted to values between
16 to 235 for luma and 16 to 240 for chroma.
The RANGE bit allows the user to limit the range of values
output by the ADV7180 to the recommended value range. In
any case, it ensures that the reserved values of 255d (0xFF) and
00d (0x00) are not presented on the output pins unless they are
part of an AV code header.
Rev. A | Page 42 of 112
Table 57. RANGE Function
RANGE
0
1 (default)
Description
16 ≤ Y ≤ 235
1 ≤ Y ≤ 254
16 ≤ C/P ≤ 240
1 ≤ C/P ≤ 254
AUTO_PDC_EN, Automatic Programmed Delay Control,
Address 0x27 [6]
Enabling AUTO_PDC_EN activates a function within the
ADV7180 that automatically programs the LTA[1:0] and
CTA[2:0] to have the chroma and luma data match delays for
all modes of operation. If set, manual registers LTA[1:0] and
CTA[2:0] are not used. If the automatic mode is disabled (by
setting the AUTO_PDC_EN bit to 0), the values programmed
into LTA[1:0] and CTA[2:0] registers become active.
When AUTO_PDC_EN is 0, the ADV7180 uses the LTA[1:0] and
CTA[2:0] values for delaying luma and chroma samples. Refer to
the LTA[1:0], Luma Timing Adjust, Address 0x27 [1:0] section
and the CTA[2:0], Chroma Timing Adjust, Address 0x27 [5:3]
section.
When AUTO_PDC_EN is 1 (default), the ADV7180 automati-
cally determines the LTA and CTA values to have luma and
chroma aligned at the output.
LTA[1:0], Luma Timing Adjust, Address 0x27 [1:0]
The luma timing adjust register allows the user to specify a
timing difference between chroma and luma samples.
Note that there is a certain functionality overlap with the
CTA[2:0] register. For manual programming, use the
following defaults:
CVBS input LTA[1:0] = 00
Y/C input LTA[1:0] = 01
YPrPb input LTA[1:0] = 01
Table 58. LTA Function
LTA[1:0]
00 (default)
01
10
11
Description
No delay
Luma 1 clock (37 ns) late
Luma 2 clock (74 ns) early
Luma 1 clock (37 ns) early
CTA[2:0], Chroma Timing Adjust, Address 0x27 [5:3]
The chroma timing adjust register allows the user to specify a
timing difference between chroma and luma samples. This may
be used to compensate for external filter group delay differences
in the luma vs. chroma path and to allow a different number of
pipeline delays while processing the video downstream. Review
this functionality together with the LTA[1:0] register.
The chroma can be delayed or advanced only in chroma pixel
steps. One chroma pixel step is equal to two luma pixels. The
programmable delay occurs after demodulation, where one can
no longer delay by luma pixel steps.
For manual programming, use the following defaults:
CVBS input CTA[2:0] = 011
Y/C input CTA[2:0] = 101
YPrPb input CTA[2:0] = 110
Table 59. CTA Function
CTA[2:0]
000
001
010
011 (default)
100
101
110
111
Description
Not used
Chroma + 2 chroma pixel (early)
Chroma + 1 chroma pixel (early)
No delay
Chroma – 1 chroma pixel (late)
Chroma – 2 chroma pixel (late)
Chroma – 3 chroma pixel (late)
Not used
相關(guān)PDF資料
PDF描述
ADV7180BSTZ 10-Bit, 4 x Oversampling SDTV Video Decoder
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相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADV7180BCPZ 制造商:Analog Devices 功能描述:IC VIDEO DECODER 10BIT 57.27MSPS LFCSP40
ADV7180BCPZ-REEL 功能描述:IC VIDEO DECODER SDTV 40-LFCSP RoHS:是 類(lèi)別:集成電路 (IC) >> 線(xiàn)性 - 視頻處理 系列:- 產(chǎn)品變化通告:Product Discontinuation 07/Mar/2011 標(biāo)準(zhǔn)包裝:3,000 系列:OMNITUNE™ 類(lèi)型:調(diào)諧器 應(yīng)用:移動(dòng)電話(huà)，手機(jī)，視頻顯示器 安裝類(lèi)型:表面貼裝 封裝/外殼:65-WFBGA 供應(yīng)商設(shè)備封裝:PG-WFSGA-65 包裝:帶卷 (TR) 其它名稱(chēng):SP000365064
ADV7180BST48Z 功能描述:IC VID DECOD SDTV 10BIT 48LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 線(xiàn)性 - 視頻處理 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 類(lèi)型:電平移位器 應(yīng)用:LCD 電視機(jī)/監(jiān)控器 安裝類(lèi)型:表面貼裝 封裝/外殼:28-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:28-WQFN（4x4）裸露焊盤(pán) 包裝:帶卷 (TR) 其它名稱(chēng):296-32523-2TPS65198RUYT-ND
ADV7180BST48Z-RL 功能描述:視頻 IC 48-Lead Low Profile Quad Flat Package RoHS:否 制造商:Fairchild Semiconductor 工作電源電壓:5 V 電源電流:80 mA 最大工作溫度:+ 85 C 封裝 / 箱體:TSSOP-28 封裝:Reel
ADV7180BSTZ 功能描述:IC VIDEO DECODER SDTV 64-LQFP RoHS:是 類(lèi)別:集成電路 (IC) >> 線(xiàn)性 - 視頻處理 系列:- 標(biāo)準(zhǔn)包裝:250 系列:- 類(lèi)型:電平移位器 應(yīng)用:LCD 電視機(jī)/監(jiān)控器 安裝類(lèi)型:表面貼裝 封裝/外殼:28-WFQFN 裸露焊盤(pán) 供應(yīng)商設(shè)備封裝:28-WQFN（4x4）裸露焊盤(pán) 包裝:帶卷 (TR) 其它名稱(chēng):296-32523-2TPS65198RUYT-ND
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