參數(shù)資料
型號: ADV7179KCPZ
廠商: Analog Devices Inc
文件頁數(shù): 3/52頁
文件大小: 0K
描述: IC ENCODER VID NTSC/PAL 40LFCSP
產(chǎn)品培訓模塊: Interfacing AV Converters to Blackfin Processors
標準包裝: 1
類型: 視頻編碼器
應用: 數(shù)碼相機,手機,便攜式視頻
電壓 - 電源,模擬: 2.8 V,3.3 V
安裝類型: 表面貼裝
封裝/外殼: 40-VFQFN 裸露焊盤,CSP
供應商設備封裝: 40-LFCSP-VQ(6x6)
包裝: 托盤
產(chǎn)品目錄頁面: 786 (CN2011-ZH PDF)
ADV7174/ADV7179
Rev. B | Page 11 of 52
GENERAL DESCRIPTION
The ADV7174/ADV7179 is an integrated digital video encoder
that converts digital CCIR-601 4:2:2 8-bit component video data
into a standard analog baseband television signal compatible
with worldwide standards.
The on-board SSAF (super sub-alias filter) with extended
luminance frequency response and sharp stop-band attenuation
enables studio quality video playback on modern TVs, giving
optimal horizontal line resolution.
An advanced power management circuit enables optimal con-
trol of power consumption in both normal operating modes
and in power-down or sleep modes.
The ADV7174/ADV7179 supports both PAL and NTSC square
pixel operation. The parts incorporate WSS and CGMS-A data
control generation.
The output video frames are synchronized with the incoming
data timing reference codes. Optionally, the encoder accepts
(and can generate) HSYNC, VSYNC, and FIELD timing signals.
These timing signals can be adjusted to change pulse width and
position while the part is in the master mode. The encoder
requires a signal two times the pixel rate (27 MHz) clock for
standard operation. Alternatively, the encoder requires a
24.5454 MHz clock for NTSC or 29.5 MHz clock for PAL
square pixel mode operation. All internal timing is generated
on-chip.
A separate Teletext port enables the user to directly input
Teletext data during the vertical blanking interval.
The ADV7174/ADV7179 modes are set up over a 2-wire serial
bidirectional port (I2 C compatible) with two slave addresses.
The ADV7174/ADV7179 is packaged in a 40-lead 6 mm × 6 mm
LFCSP package.
DATA PATH DESCRIPTION
For PAL B/D/G/H/I/M/N and NTSC M and N modes, YCrCb
4:2:2 data is input via the CCIR-656 compatible pixel port at a
27 MHz data rate. The pixel data is demultiplexed to form three
data paths. Y typically has a range of 16 to 235, and Cr and Cb
typically have a range of 128 ± 112; however, it is possible to
input data from 1 to 254 on both Y, Cb, and Cr. The ADV7174/
ADV7179 supports PAL (B/D/G/H/I/M/N) and NTSC (with
and without pedestal) standards. The appropriate SYNC, BLANK
,
and burst levels are added to the YCrCb data. Macrovision
Anti-
taping (ADV7174 only), closed-captioning, and Teletext
levels
are also added to Y and the resultant data is interpolated
to a
rate of 27 MHz. The interpolated data is filtered and scaled
by
three digital FIR filters.
The U and V signals are modulated by the appropriate subcarrier
sine/cosine phases and added together to make up the chromi-
nance signal. The luma (Y) signal can be delayed 1–3 luma
cycles (each cycle is 74 ns) with respect to the chroma signal.
The luma and chroma signals are then added together to make
up the composite video signal. All edges are slew rate limited.
The YCrCb data is also used to generate RGB data with
appropriate SYNC and BLANK levels. The RGB data is in
synchronization with the composite video output. Alternatively,
analog YPbPr data can be generated instead of RGB data.
The three l0-bit DACs can be used to output:
Composite Video + Composite Video
S-Video + Composite Video
YPrPb Video
SCART RGB Video
Alternatively, each DAC can be individually powered off if not
required.
Video output levels are illustrated in Appendix 6.
INTERNAL FILTER RESPONSE
The Y filter supports several different frequency responses,
including two low-pass responses, two notch responses, an
extended (SSAF) response, a CIF response, and a QCIF
response. The UV filter supports several different frequency
responses, including four low-pass responses, a CIF response,
and a QCIF response. These can be seen in Table 7 and Table 8
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