參數(shù)資料
型號(hào)： ADV3002BSTZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 9/28頁(yè)
文件大?。?/td> 0K
描述： IC SWITCH HDMI/DVI 4:1 80LQFP
產(chǎn)品變化通告： Marking Change 25/Mar/2009
標(biāo)準(zhǔn)包裝： 90
功能： 開關(guān)
電路： 1 x 4:1
電壓電源： 單電源
電壓 - 電源，單路/雙路(±)： 3 V ~ 3.6 V
工作溫度： 0°C ~ 85°C
安裝類型： 表面貼裝
封裝/外殼： 80-LQFP
供應(yīng)商設(shè)備封裝： 80-LQFP（14x14）
包裝： 托盤
Data Sheet
ADV3002
Rev. B | Page 17 of 28
SERIAL CONTROL INTERFACE
RESET
On initial power-up, or at any point in operation, the ADV3002
register set can be restored to the default values by pulling the
RESETB pin low according to the specification in Table 3.
During normal operation, however, the RESETB pin must
be pulled up to 3.3 V.
WRITE PROCEDURE
To write data to the ADV3002 register set, an I2C master (such
as a microcontroller) needs to send the appropriate control
signals to the ADV3002 slave device. The signals are controlled
by the I2C master, unless otherwise specified. For a diagram of
the procedure, see Figure 32. The steps for a write procedure are
as follows:
1. Send a start condition (while holding the I2C_SCL line
high and pulling the I2C_SDA line low).
2. Send the ADV3002 part address (seven bits). The upper five
bits of the ADV3002 part address are the static value [10010]
and the two LSBs are set by Input Pins I2C_ADDR[1:0].
This transfer should be MSB first.
3. Send the write indicator bit (0).
4. Wait for the ADV3002 to acknowledge the request.
5. Send the register address (eight bits) to which data is to be
written. This transfer should be MSB first.
6. Wait for the ADV3002 to acknowledge the request.
7. Send the data (eight bits) to be written to the register
whose address was set in Step 5. This transfer should be
MSB first.
8. Wait for the ADV3002 to acknowledge the request.
9. Do one of the following:
a. Send a stop condition (while holding the I2C_SCL
line high and pulling the I2C_SDA line high) and
release control of the bus to end the transaction
(shown in Figure 32).
b. Send a repeated start condition (while holding the
I2C_SCL line high and pulling the I2C_SDA line low)
and continue from Step 2 in this procedure to perform
another write.
c. Send a repeated start condition (while holding the
I2C_SCL line high and pulling the I2C_SDA line low)
and continue from Step 2 of the read procedure (in the
Read Procedure section) to perform a read from
another address.
d. Send a repeated start condition (while holding the
I2C_SCL line high and pulling the I2C_SDA line low)
and continue from Step 8 of the read procedure (in the
Read Procedure section) to perform a read from the
same address set in Step 5 of the write procedure.
R/W
ACK
ADDR
START
FIXED ADDR PART
REGISTER ADDR
DATA
STOP
ACK
1
2
3
4
5
6
7
8
9
I2C_SCL
GENERAL CASE
I2C_SDA
EXAMPLE
I2C_SDA
07905-
012
*
*THE SWITCHING/UPDATE DELAY BEGINS AT THE FALLING EDGE OF THE LAST DATA BIT;
FOR EXAMPLE, THE FALLING EDGE JUST BEFORE STEP 8.
Figure 32. I2C Write Procedure
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