參數(shù)資料
型號(hào): ADV3002BSTZ
廠商: Analog Devices Inc
文件頁(yè)數(shù): 11/28頁(yè)
文件大?。?/td> 0K
描述: IC SWITCH HDMI/DVI 4:1 80LQFP
產(chǎn)品變化通告: Marking Change 25/Mar/2009
標(biāo)準(zhǔn)包裝: 90
功能: 開(kāi)關(guān)
電路: 1 x 4:1
電壓電源: 單電源
電壓 - 電源,單路/雙路(±): 3 V ~ 3.6 V
工作溫度: 0°C ~ 85°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 80-LQFP
供應(yīng)商設(shè)備封裝: 80-LQFP(14x14)
包裝: 托盤(pán)
Data Sheet
ADV3002
Rev. B | Page 19 of 28
REGISTER MAP
Table 10. Register Map
Address
Default
Register Name
Bit
Bit Name
Description
0x00
Channel select control
7:3
Unused
2
CH_SRC
0: input selected by SEL[1:0] parallel pins
1: input selected by channel select control register, CH[1:0]
channel select
1:0
CH[1:0] channel
00: Input A selected if CH_SRC = 1
select
01: Input B selected if CH_SRC = 1
10: Input C selected if CH_SRC = 1
11: Input D selected if CH_SRC = 1
0x01
0x07
TMDS output control
7:4
Unused
3
TX_EN_SRC
0: TMDS output enable controlled by the TX_EN parallel pin
1: TMDS output enable controlled by the TX_EN bit
2
TX_EN
0: TMDS output disabled if TX_EN_SRC = 1
1: TMDS output enabled if TX_EN_SRC = 1
1
TX_OCL
0: TMDS output current = 10 mA
1: TMDS output current = 20 mA
0
TX_OTO
0: TMDS output termination = off
1: TMDS output termination = on
0x02
TMDS input control
7:2
Unused
1
EQ_SEL
0: TMDS equalizer boost = 6 dB
1: TMDS equalizer boost = 18 dB
0
ISIGN
0: TMDS input polarity = standard
1: TMDS input polarity = inverse
0x03
0x0F
TMDS input termination
7:4
ITO_SRC[3:0]
0000: input termination control is automatic
control
1111: input termination control is manual
3:0
ITO_CTL[3:0]
0000: all input terminations off if input termination control
is manual
0001: Input A termination on if input termination control is
manual
0010: Input B termination on if input termination control is
manual
0100: Input C termination on if input termination control is
manual
1000: Input D termination on if input termination control is
manual
1111: all input terminations on if input termination control
is manual
0x04
0x07
Auxiliary buffer enables
7:3
Unused
2
Reserved
Reserved; set to 1
1
DDC_EN
0: DDC buffer disabled
1: DDC buffer enabled
0
CEC_EN
0: CEC buffer disabled
1: CEC buffer enabled
0x05
Hot plug detect pulse
width control
7:0
HPD_PW[7:0]
Pulse width = decimal (HPD_PW) × step size (24 ms typical)
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