參數(shù)資料
型號(hào)： ADUC834BCPZ
廠商： Analog Devices Inc
文件頁(yè)數(shù)： 22/80頁(yè)
文件大?。?/td> 0K
描述： IC MCU 62K FLASH ADC/DAC 56LFCSP
標(biāo)準(zhǔn)包裝： 1
系列： MicroConverter® ADuC8xx
核心處理器： 8052
芯體尺寸： 8-位
速度： 12.58MHz
連通性： EBI/EMI，I²C，SPI，UART/USART
外圍設(shè)備： POR，PSM，PWM，溫度傳感器，WDT
輸入/輸出數(shù)： 34
程序存儲(chǔ)器容量： 62KB（62K x 8）
程序存儲(chǔ)器類(lèi)型： 閃存
EEPROM 大?。?/td> 4K x 8
RAM 容量： 2.25K x 8
電壓 - 電源 (Vcc/Vdd)： 2.7 V ~ 5.25 V
數(shù)據(jù)轉(zhuǎn)換器： A/D 3x16b，4x24b; D/A 1x12b
振蕩器型： 內(nèi)部
工作溫度： -40°C ~ 85°C
封裝/外殼： 56-VFQFN 裸露焊盤(pán)，CSP
包裝： 托盤(pán)
REV. A
ADuC834
–29–
Like EEPROM, Flash memory can be programmed in-system at
a byte level, although it must first be erased; the erase being
performed in page blocks. Thus, Flash memory is often and
more correctly referred to as Flash/EE memory.
FLASH/EE MEMORY
TECHNOLOGY
SPACE EFFICIENT/
DENSITY
IN-CIRCUIT
REPROGRAMMABLE
EPROM
TECHNOLOGY
EEPROM
TECHNOLOGY
Figure 15. Flash/EE Memory Development
Overall, Flash/EE memory represents a step closer to the ideal
memory device that includes nonvolatility, in-circuit program-
mability, high density, and low cost. Incorporated in the
ADuC834, Flash/EE memory technology allows the user to
update program code space in-circuit, without the need to replace
onetime programmable (OTP) devices at remote operating nodes.
Flash/EE Memory and the ADuC834
The ADuC834 provides two arrays of Flash/EE memory for
user applications. 62 Kbytes of Flash/EE Program space are
provided on-chip to facilitate code execution without any exter-
nal discrete ROM device requirements. The program memory
can be programmed in-circuit, using the serial download mode
provided, using conventional third party memory programmers,
or via any user defined protocol in User Download (ULOAD) Mode.
A 4 Kbyte Flash/EE Data Memory space is also provided on-chip.
This may be used as a general-purpose, nonvolatile scratchpad
area. User access to this area is via a group of seven SFRs. This
space can be programmed at a byte level, although it must first
be erased in 4-byte pages.
ADuC834 Flash/EE Memory Reliability
The Flash/EE Program and Data Memory arrays on the ADuC834
are fully qualified for two key Flash/EE memory characteristics,
namely Flash/EE Memory Cycling Endurance and Flash/EE
Memory Data Retention.
Endurance quantifies the ability of the Flash/EE memory to be
cycled through many Program, Read, and Erase cycles. In real
terms, a single endurance cycle is composed of four independent,
sequential events. These events are defined as:
a. initial page erase sequence
b. read/verify sequence
c. byte program sequence
d. second read/verify sequence
In reliability qualification, every byte in both the program and
data Flash/EE memory is cycled from 00H to FFH until a first
fail is recorded, signifying the endurance limit of the on-chip
Flash/EE memory.
ADuC834 Flash/EE memory endurance qualification has been
carried out in accordance with JEDEC Specification A117 over
the industrial temperature range of –40
°C, +25°C, +85°C, and
+125
°C. The results allow the specification of a minimum
endurance figure over supply and temperature of 100,000
cycles, with an endurance figure of 700,000 cycles being typical
of operation at 25
°C.
Retention quantifies the ability of the Flash/EE memory to retain
its programmed data over time. Again, the ADuC834 has been
qualified in accordance with the formal JEDEC Retention Life-
time Specification (A117) at a specific junction temperature
(TJ = 55
°C). As part of this qualification procedure, the
Flash/EE memory is cycled to its specified endurance limit
described above, before data retention is characterized. This
means that the Flash/EE memory is guaranteed to retain its data
for its full specified retention lifetime every time the Flash/EE
memory is reprogrammed. It should also be noted that retention
lifetime, based on an activation energy of 0.6 eV, will derate
with TJ as shown in Figure 16.
40
60
70
90
TJ JUNCTION TEMPERATURE – C
RETENTION
–
Years
250
200
150
100
50
0
50
80
110
300
100
ADI SPECIFICATION
100 YEARS MIN.
AT T
J = 55 C
Figure 16. Flash/EE Memory Data Retention
A single Flash/EE
Memory Endurance
Cycle
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