參數(shù)資料
型號(hào)： ADuC812
廠商： Analog Devices, Inc.
英文描述： 12-Bit ADC with Embedded FLASH MCU(12位8通道A/D轉(zhuǎn)換器)
中文描述： 12位ADC，嵌入式閃存微控制器（12位8通道的A / D轉(zhuǎn)換器）
文件頁數(shù)： 4/31頁
文件大?。?/td> 543K
代理商： ADUC812
REV. 0
–4–
ADuC812–SPECIFICATIONS
1, 2
ADuC812BS
V
DD
= 5 V
Parameter
V
DD
= 3 V
Units
Test Conditions/Comments
DIGITAL OUTPUTS
Output High Voltage (V
OH
)
2.4
V min
V
DD
= 4.5 V to 5.5 V
I
SOURCE
= 80
μ
A
V
DD
= 2.7 V to 3.3 V
I
SOURCE
= 20
μ
A
4.0
2.6
V typ
Output Low Voltage (V
OL
)
ALE,
PSEN
, Ports 0 and 2
0.4
0.2
0.4
0.2
±
10
±
5
10
V max
V typ
V max
V typ
μ
A max
μ
A typ
pF typ
I
SINK
= 1.6 mA
I
SINK
= 1.6 mA
I
SINK
= 8 mA
I
SINK
= 8 mA
0.2
Port 3
0.2
Floating State Leakage Current
±
5
10
Floating State Output Capacitance
POWER REQUIREMENTS
13, 14, 15
I
DD
Normal Mode
16
42
32
26
8
25
18
15
7
50
5
mA max
mA typ
mA typ
mA typ
mA max
mA typ
mA typ
mA typ
μ
A max
μ
A typ
MCLKIN = 16 MHz
MCLKIN = 16 MHz
MCLKIN = 12 MHz
MCLKIN = 1 MHz
MCLKIN = 16 MHz
MCLKIN = 16 MHz
MCLKIN = 12 MHz
MCLKIN = 1 MHz
16
12
3
I
DD
Idle Mode
17
6
2
50
5
I
DD
Power-Down Mode
17
NOTES
Specifications apply after calibration.
2
Temperature range –40
°
C to +85
°
C.
3
Linearity is guaranteed during normal MicroConverter Core operation.
4
Linearity may degrade when programming or erasing the 640 Byte Flash/EE space during ADC conversion times due to on-chip charge pump activity.
5
Measured in production at V
DD
= 5 V after Software Calibration Routine at +25
°
C only.
6
User may need to execute Software Calibration Routine to achieve these specifications, which are configuration dependent.
7
The offset and gain calibration spans are defined as the voltage range of user system offset and gain errors that the ADuC812 can compensate.
8
SNR calculation includes distortion and noise components.
9
The temperature sensor will give a measure of the die temperature directly, air temperature can be inferred from this result.
10
DAC linearity is calculated using:
reduced code range of 48 to 4095, 0 to V
REF
range
reduced code range of 48 to 3995, 0 to V
DD
range
DAC output load = 10 k
and 50 pF.
11
Flash/EE Memory Performance Specifications are qualified as per JEDEC Specification A103 (Data Retention) and JEDEC Draft Specification All7 (Endurance).
12
Endurance Cycling is evaluated under the following conditions:
Mode
= Byte Programming, Page Erase Cycling
Cycle Pattern
= 00Hex to FFHex
Erase Time
= 20 ms
Program Time
= 100
μ
s
13
I
DD
at other MCLKIN frequencies is typically given by:
Normal Mode (V
DD
= 5 V):
I
DD
= (1.6
×
MCLKIN) + 6
Normal Mode (V
DD
= 3 V):
I
DD
= (0.8
×
MCLKIN) + 3
Idle Mode (V
DD
= 5 V):
I
DD
= (0.75
×
MCLKIN) + 6
Idle Mode (V
DD
= 3 V):
I
DD
= (0.25
×
MCLKIN) + 3
Where MCLKIN is the oscillator frequency in MHz and resultant I
DD
values are in mA.
14
I
DD
Currents are expressed as a summation of analog and digital power supply currents during normal MicroConverter operation.
15
I
DD
is not measured during Flash/EE program or erase cycles; I
DD
will typically increase by 10 mA during these cycles.
16
Analog I
DD
= 2 mA (typ) in normal operation (internal V
REF
, ADC and DAC peripherals powered on).
17
EA = Port0 = DV
DD
, XTAL1 (Input) tied to DV
DD
, during this measurement.
Typical specifications are not production tested, but are supported by characterization data at initial product release.
Specifications subject to change without notice.
Please refer to User Guide, Quick Reference Guide, Application Notes and Silicon Errata Sheet at www.analog.com/microconverter for additional information.
相關(guān)PDF資料
PDF描述
ADUC812 Circular Connector; MIL SPEC:MIL-DTL-38999 Series I; Body Material:Metal; Series:LJT; No. of Contacts:37; Connector Shell Size:25; Connecting Termination:Crimp; Circular Shell Style:Jam Nut Receptacle; Body Style:Straight RoHS Compliant: No
ADUC812BS Circular Connector; No. of Contacts:37; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:25; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:25-37
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