參數(shù)資料
型號(hào): ADT7473ARQZ-1REEL
廠商: ANALOG DEVICES INC
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 2.50Cel, RECTANGULAR, SURFACE MOUNT
封裝: ROHS COMPLIANT, MO-137AB, QSOP-16
文件頁(yè)數(shù): 65/72頁(yè)
文件大?。?/td> 1494K
代理商: ADT7473ARQZ-1REEL
ADT7473/ADT7473-1
Rev. C | Page 68 of 72
Table 52. Register 0x74—Interrupt Mask Register 1 (Power-On Default = 0x00)
Bit
Name
R/W
Description
[1]
VCCP
R/W
VCCP = 1, masks SMBALERT for out-of-limit conditions on the VCCP channel.
[2]
VCC
R/W
VCC = 1, masks SMBALERT for out-of-limit conditions on the VCC channel.
[4]
R1T
R/W
R1T = 1, masks SMBALERT for out-of-limit conditions on the Remote 1 temperature channel.
[5]
LT
R/W
LT = 1, masks SMBALERT for out-of-limit conditions on the local temperature channel.
[6]
R2T
R/W
R2T = 1, masks SMBALERT for out-of-limit conditions on the Remote 2 temperature channel.
[7]
OOL
R/W
OOL = 0, then when one or more alerts are generated in Interrupt Status Register 2, assuming all the
mask bits in the Interrupt Mask Register 2 (0x75) = 1, SMBALERT are still asserted.
OOL = 1, then when one or more alerts are generated in Interrupt Status Register 2, assuming all the
mask bits in the Interrupt Mask Register 2 (0x75) = 1, SMBALERT are not asserted.
Table 53. Register 0x75—Interrupt Mask Register 2 (Power-On Default <7:0> = 0x00)
Bit
Name
R/W
Description
[1]
OVT
R/W
OVT = 1, masks SMBALERT for overtemperature THERM conditions.
[2]
FAN1
R/W
FAN1 = 1, masks SMBALERT for a Fan 1 fault.
[3]
FAN2
R/W
FAN2 = 1, masks SMBALERT for a Fan 2 fault.
[4]
FAN3
R/W
FAN3 = 1, masks SMBALERT for a Fan 3 fault.
[5]
F4P
R/W
F4P = 1, masks SMBALERT for a Fan 4 fault. If the TACH4 pin is being used as the THERM input, this
bit masks SMBALERT for a THERM timer event.
[6]
D1
R/W
D1 = 1, masks SMBALERT for a diode open or short on a Remote 1 channel.
[7]
D2
R/W
D2 = 1, masks SMBALERT for a diode open or short on a Remote 2 channel.
Table 54. Register 0x76—Extended Resolution 11 (Power-On Default = 0x00)
Bit
Name
R/W
Description
[3:2]
VCCP
Read-only
VCCP LSBs. Holds the 2 LSBs of the 10-bit VCCP measurement.
[5:4]
VCC
Read-only
VCC LSBs. Holds the 2 LSBs of the 10-bit VCC measurement.
1 If this register is read, this register and the registers holding the MSB of each reading are frozen until read.
Table 55. Register 0x77—Extended Resolution Register 21 (Power-On Default = 0x00)
Bit
Name
R/W
Description
[3:2]
TDM1
Read-only
Remote 1 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 1 temperature measurement.
[5:4]
LTMP
Read-only
Local temperature LSBs. Holds the 2 LSBs of the 10-bit local temperature measurement.
[7:6]
TDM2
Read-only
Remote 2 temperature LSBs. Holds the 2 LSBs of the 10-bit Remote 2 temperature measurement.
1 If this register is read, this register and the registers holding the MSB of each reading are frozen until read.
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