參數(shù)資料
型號: ADT7411ARQ-REEL
廠商: Analog Devices, Inc.
元件分類: 圓形連接器
英文描述: Circular Connector; No. of Contacts:26; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Pin; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:17-26
中文描述: SPI/I2C兼容,10位數(shù)字溫度傳感器和8通道ADC
文件頁數(shù): 26/36頁
文件大?。?/td> 456K
代理商: ADT7411ARQ-REEL
ADT7411
AIN3 V
HIGH
Limit Register (Read/Write) [Address = 2Dh]
This limit register is an 8-bit read/write register that stores the
AIN3 input upper limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
sured AIN3 value has to be greater than the value in this reg-
ister. Because it is an 8-bit register, the resolution is four times
less than the resolution of the 10-bit ADC. The default value is
full-scale voltage.
Rev. A | Page 26 of 36
Table 48. AIN3 V
HIGH
Limit
D7
D6
D7
D6
1*
1*
*Default settings at power-up.
AIN3 V
LOW
Limit Register (Read/Write) [Address = 2Eh]
This limit register is an 8-bit read/write register that stores the
AIN3 input lower limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
sured AIN3 value has to be less than or equal to the value in this
register. Because it is an 8-bit register, the resolution is four
times less than the resolution of the 10-bit ADC. The default
value is 0 V.
D5
D5
1*
D4
D4
1*
D3
D3
1*
D2
D2
1*
D1
D1
1*
D0
D0
1*
Table 49. AIN3 V
LOW
Limit
D7
D6
D7
D6
0*
0*
*Default settings at power-up.
AIN4 V
HIGH
Limit Register (Read/Write) [Address = 2Fh]
This limit register is an 8-bit read/write register that stores the
AIN4 input upper limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
sured AIN4 value has to be greater than the value in this reg-
ister. Because it is an 8-bit register, the resolution is four times
less than the resolution of the 10-bit ADC. The default value is
full-scale voltage.
D5
D5
0*
D4
D4
0*
D3
D3
0*
D2
D2
0*
D1
D1
0*
D0
D0
0*
Table 50. AIN4 V
HIGH
Limit
D7
D6
D7
D6
1*
1*
*Default settings at power-up.
AIN4 V
LOW
Limit Register (Read/Write) [Address = 30h]
This limit register is an 8-bit read/write register that stores the
AIN4 input lower limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
sured AIN4 value has to be less than or equal to the value in this
register. Because it is an 8-bit register, the resolution is four
times less than the resolution of the 10-bit ADC. The default
value is 0 V.
D5
D5
1*
D4
D4
1*
D3
D3
1*
D2
D2
1*
D1
D1
1*
D0
D0
1*
Table 51. AIN4 V
LOW
Limit
D7
D6
D7
D6
0*
0*
*Default settings at power-up.
AIN5 V
HIGH
Limit Register (Read/Write) [Address = 31h]
This limit register is an 8-bit read/write register that stores the
AIN5 input upper limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
sured AIN5 value has to be greater than the value in this reg-
ister. Because it is an 8-bit register, the resolution is four times
less than the resolution of the 10-bit ADC. The default value is
full-scale voltage.
D5
D5
0*
D4
D4
0*
D3
D3
0*
D2
D2
0*
D1
D1
0*
D0
D0
0*
Table 52. AIN5 V
HIGH
Limit
D7
D6
D7
D6
1*
1*
*Default settings at power-up.
AIN5 V
LOW
Limit Register (Read/Write) [Address = 32h]
This limit register is an 8-bit read/write register that stores the
AIN5 input lower limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the meas-
ured AIN5 value has to be less than or equal to the value in this
register. Because it is an 8-bit register, the resolution is four
times less than the resolution of the 10-bit ADC. The default
value is 0 V.
D5
D5
1*
D4
D4
1*
D3
D3
1*
D2
D2
1*
D1
D1
1*
D0
D0
1*
Table 53. AIN5 V
LOW
Limit
D7
D6
D7
D6
0*
0*
*Default settings at power-up.
AIN6 V
HIGH
Limit Register (Read/Write) [Address = 33h]
This limit register is an 8-bit read/write register that stores the
AIN3 input upper limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
sured AIN6 value has to be greater than the value in this reg-
ister. Because it is an 8-bit register, the resolution is four times
less than the resolution of the 10-bit ADC. The default value is
full-scale voltage.
D5
D5
0*
D4
D4
0*
D3
D3
0*
D2
D2
0*
D1
D1
0*
D0
D0
0*
Table 54. AIN6 V
HIGH
Limit
D7
D6
D7
D6
1*
1*
*Default settings at power-up at power-up.
AIN6 V
LOW
Limit Register (Read/Write) [Address = 34h]
This limit register is an 8-bit read/write register that stores the
AIN6 input lower limit that will cause an interrupt and activate
the INT/INT output (if enabled). For this to happen, the mea-
D5
D5
1*
D4
D4
1*
D3
D3
1*
D2
D2
1*
D1
D1
1*
D0
D0
1*
相關PDF資料
PDF描述
ADT7411ARQ-REEL7 Circular Connector; No. of Contacts:55; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Pin; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:17-35
ADT7411ARQZ-REEL Circular Connector; No. of Contacts:55; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Pin; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:17-35
ADT7411ARQZ-REEL7 Circular Connector; No. of Contacts:55; Series:LJT07R; Body Material:Aluminum; Connecting Termination:Crimp; Connector Shell Size:17; Circular Contact Gender:Socket; Circular Shell Style:Jam Nut Receptacle; Insert Arrangement:17-35
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參數(shù)描述
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