參數(shù)資料
型號: ADT7318ARU
廠商: ANALOG DEVICES INC
元件分類: 溫度/濕度傳感器
英文描述: DIGITAL TEMP SENSOR-SERIAL, 8BIT(s), 3Cel, RECTANGULAR, SURFACE MOUNT
封裝: QSOP-16
文件頁數(shù): 10/24頁
文件大?。?/td> 279K
代理商: ADT7318ARU
–18–
REV. PrH
Preliminary Technical Data
PRELIMINARY TECHNICAL DATA
ADT7316/7317/7318
DAC B HIGH REGISTER
This 8-bit read/write register contains the digital data for
DAC B to convert to an analog representation. As the
ADT7318 has only an 8-bit DAC this register is all that is
is need for it’s DAC B. But in the case of the ADT7316
(12-Bit) and ADT7317 (10-Bit) this register contains the
8 MSBs of the DAC B word.
Table xx. DAC B High Register
D7
D6
D5
D4
D3
D2
D1
D0
M S B B6
B5
B4
B3
B2
B1
B0
DAC B LOW REGISTER (ADT7316/17 ONLY)
This 8-bit read/write register conatins the LSBs of the
DAC B word. In the case of the ADT7317 the 2 LSBs are
stored here and for the ADT7316 the 4 LSBs are stored
here.
Table xx. ADT7317 DAC B Low Register
D7
D6
D5
D4
D3
D2
D1
D0
B 1
L S B
00
000
0
Table xx. ADT7316 DAC B Low Register
D7
D6
D5
D4
D3
D2
D1
D0
B3
B2
B1
LSB
0
DAC C HIGH REGISTER
This 8-bit read/write register contains the digital data for
DAC C to convert to an analog representation. As the
ADT7318 has only an 8-bit DAC this register is all that is
is need for it’s DAC C. But in the case of the ADT7316
(12-Bit) and ADT7317 (10-Bit) this register contains the
8 MSBs of the DAC C word.
Table xx. DAC C High Register
D7
D6
D5
D4
D3
D2
D1
D0
M S B B6
B5
B4
B3
B2
B1
B0
DAC C LOW REGISTER (ADT7316/17 ONLY)
This 8-bit read/write register conatins the LSBs of the
DAC C word. In the case of the ADT7317 the 2 LSBs are
stored here and for the ADT7316 the 4 LSBs are stored
here.
Table xx. ADT7317 DAC C Low Register
D7
D6
D5
D4
D3
D2
D1
D0
B 1
L S B
00
000
0
Table xx. ADT7316 DAC C Low Register
D7
D6
D5
D4
D3
D2
D1
D0
B3
B2
B1
LSB
0
R/
9
1
SCL
SDA
0
1
A2A1
A0
P7P6
P5
P4
P3
P2
P1
P0
ACK. BY
ADT7316/17/18
STOP BY
MASTER
START BY
MASTER
FR AME 1
SERIAL BUS ADDRESS B YTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
19
1
ACK. BY
ADT7316/17/18
9
R/
9
1
SCL
SDA
0
1
A2
A1
A0
P7
P6
P5
P4
P3
P2
P1
P0
ACK. BY
ADT7316/17/18
START BY
MASTER
FRAME 1
SERIAL BUS ADDRESS B YTE
FRAME 2
ADDRESS POINTER REGISTER BYTE
19
1
ACK. BY
ADT7316/17/18
9
D7
D6
D5
D4
D3
D2
D1
D0
ACK. BY
ADT7316/17/18
STOP BY
MASTER
FRAME 3
DATA BYTE
19
SCL (CONTINUED)
SDA (CONTINUED)
Figure xx. I2C - Writing to the Address Pointer Register followed by a single byte of data to the selected register
Figure xx. I2C - Writing to the Address Pointer Register to select a register for a subsequent Read operation
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