參數資料
型號: ADSP-BF516BBCZ-4F4
廠商: Analog Devices Inc
文件頁數: 48/68頁
文件大?。?/td> 0K
描述: IC DSP 16/32B 400MHZ 168CSPBGA
標準包裝: 1
系列: Blackfin®
類型: 定點
接口: 以太網,I²C,PPI,RSI,SPI,SPORT,UART/USART
時鐘速率: 400MHz
非易失內存: 閃存(4Mb)
芯片上RAM: 116kB
電壓 - 輸入/輸出: 1.8V,2.5V,3.3V
電壓 - 核心: 1.30V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 168-LFBGA,CSPBGA
供應商設備封裝: 168-CSPBGA(12x12)
包裝: 托盤
Rev. B
|
Page 52 of 68
|
January 2011
ADSP-BF512/BF512F, BF514/BF514F, BF516/BF516F, BF518/BF518F
TEST CONDITIONS
All timing parameters appearing in this data sheet were mea-
sured under the conditions described in this section. Figure 53
shows the measurement point for ac measurements (except out-
put enable/disable). The measurement point VMEAS is VDDEXT/2
or VDDMEM/2 for VDDEXT/VDDMEM (nominal) = 1.8 V/2.5 V/3.3 V.
Output Enable Time Measurement
Output signals are considered to be enabled when they have
made a transition from a high impedance state to the point
when they start driving.
The output enable time tENA is the interval from the point when
a reference signal reaches a high or low voltage level to the point
when the output starts driving as shown on the right side of
The time tENA_MEASURED is the interval from when the reference
signal switches to when the output voltage reaches VTRIP(high)
or VTRIP(low). For VDDEXT (nominal) = 1.8 V, VTRIP (high) is
0.95 V, and VTRIP (low) is 0.85 V. For VDDEXT (nominal) = 2.5 V,
VTRIP (high) is 1.3 V and VTRIP (low) is 1.2 V. For VDDEXT (nomi-
nal) = 3.3 V, VTRIP (high) is 1.7 V, and VTRIP (low) is 1.6 V. Time
tTRIP is the interval from when the output starts driving to when
the output reaches the VTRIP(high) or VTRIP(low) trip voltage.
Time tENA is calculated as shown in the equation:
If multiple signals (such as the data bus) are enabled, the mea-
surement value is that of the first signal to start driving.
Figure 50. Driver Type E Current (3.3V VDDEXT/VDDMEM)
Figure 51. Driver Type E Current (2.5V VDDEXT/VDDMEM)
Figure 52. Driver Type E Current (1.8V VDDEXT/VDDMEM)
0
SOURCE
CURRENT
(
m
A)
SOURCE VOLTAGE (V)
0
0.5
1.0
1.5
2.0
2.5
3.0
3.5
60
30
20
–60
–30
–10
VOL
V
DDEXT = 3.6V @ – 40°C
V
DDEXT = 3.3V @ 25°C
–20
–40
10
40
V
DDEXT = 3.0V @ 105°C
50
–50
3.0
3.5
0
SOURCE
CURRENT
(
m
A)
SOURCE VOLTAGE (V)
0
0.5
1.0
1.5
2.0
2.5
40
30
10
–40
–30
–10
VOL
V
DDEXT = 2.75V @ – 40°C
V
DDEXT = 2.5V @ 25°C
20
–20
V
DDEXT = 2.25V @ 105°C
3.5
0
SOURCE
CURRENT
(
m
A)
SOURCE VOLTAGE (V)
0
0.5
1.0
1.5
20
15
10
–20
–15
–5
VOL
V
DDEXT = 1.9V @ – 40°C
V
DDEXT = 1.8V @ 25°C
–10
5
V
DDEXT = 1.7V @ 105°C
3.0
2.5
2.0
Figure 53. Voltage Reference Levels for AC
Measurements (Except Output Enable/Disable)
Figure 54. Output Enable/Disable
INPUT
OR
OUTPUT
VMEAS
REFERENCE
SIGNAL
tDIS
OUTPUT STARTS DRIVING
VOH (MEASURED) - ΔV
VOL (MEASURED) + ΔV
tDIS_MEASURED
VOH
(MEASURED)
VOL
(MEASURED)
VTRIP(HIGH)
VOH(MEASURED)
VOL(MEASURED)
HIGH IMPEDANCE STATE
OUTPUT STOPS DRIVING
tENA
tDECAY
tENA_MEASURED
tTRIP
VTRIP(LOW)
tENA
tENA_MEASURED tTRIP
=
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