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參數(shù)資料
| 型號： | ADSP-2186LBSTZ-160 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 1/48頁 |
| 文件大?。?/td> | 0K |
| 描述： | IC DSP CONTROLLER 16BIT 100LQFP |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | ADSP-21xx |
| 類型： | 定點 |
| 接口： | 主機接口，串行端口 |
| 時鐘速率： | 40MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 40kB |
| 電壓 - 輸入/輸出： | 3.30V |
| 電壓 - 核心： | 3.30V |
| 工作溫度： | -40°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 100-LQFP |
| 供應(yīng)商設(shè)備封裝： | 100-LQFP（14x14） |
| 包裝： | 托盤 |
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ICE-Port is a trademark of Analog Devices, Inc.
DSP Microcomputer
ADSP-2184L/ADSP-2185L/ADSP-2186L/ADSP-2187L
Rev. C
Information furnished by Analog Devices is believed to be accurate and reliable.
However, no responsibility is assumed by Analog Devices for its use, nor for any
infringements of patents or other rights of third parties that may result from its use.
Specifications subject to change without notice. No license is granted by implication
or otherwise under any patent or patent rights of Analog Devices. Trademarks and
registered trademarks are the property of their respective owners.
One Technology Way, P.O.Box 9106, Norwood, MA 02062-9106 U.S.A.
Tel: 781.329.4700
Fax: 781.461.3113
2008 Analog Devices, Inc. All rights reserved.
PERFORMANCE FEATURES
Up to 19 ns instruction cycle time, 52 MIPS sustained
performance
Single-cycle instruction execution
Single-cycle context switch
3-bus architecture allows dual operand fetches in every
instruction cycle
Multifunction instructions
Power-down mode featuring low CMOS standby power dissi-
pation with 400 CLKIN cycle recovery from power-down
condition
Low power dissipation in idle mode
INTEGRATION FEATURES
ADSP-2100 family code compatible (easy to use algebraic
syntax), with instruction set extensions
Up to 160K bytes of on-chip RAM, configured
Up to 32K words program memory RAM
Up to 32K words data memory RAM
Dual-purpose program memory for both instruction and
data storage
Independent ALU, multiplier/accumulator, and barrel shifter
computational units
2 independent data address generators
Powerful program sequencer provides zero overhead loop-
ing conditional instruction execution
Programmable 16-bit interval timer with prescaler
100-lead LQFP and 144-ball BGA
SYSTEM INTERFACE FEATURES
16-bit internal DMA port for high-speed access to on-chip
memory (mode selectable)
4M-byte memory interface for storage of data tables and pro-
gram overlays (mode selectable)
8-bit DMA to byte memory for transparent program and data
memory transfers (mode selectable)
Programmable memory strobe and separate I/O memory
space permits “glueless” system design
Programmable wait state generation
2 double-buffered serial ports with companding hardware
and automatic data buffering
Automatic booting of on-chip program memory from byte-
wide external memory, for example, EPROM, or through
internal DMA Port
6 external interrupts
13 programmable flag pins provide flexible system signaling
UART emulation through software SPORT reconfiguration
ICE-Port emulator interface supports debugging in final
systems
Figure 1. Functional Block Diagram
ARITHMETIC UNITS
SHIFTER
MAC
ALU
PROGRAM MEMORY ADDRESS
DATA MEMORY ADDRESS
PROGRAM MEMORY DATA
DATA MEMORY DATA
POWER-DOWN
CONTROL
MEMORY
PROGRAM
MEMORY
UP TO
32K
24-BIT
EXTERNAL
ADDRESS
BUS
EXTERNAL
DATA
BUS
BYTE DMA
CONTROLLER
SPORT0
SERIAL PORTS
SPORT1
PROGRAMMABLE
I/O
AND
FLAGS
TIMER
HOST MODE
OR
EXTERNAL
DATA
BUS
INTERNAL
DMA
PORT
DAG1
DATA ADDRESS
GENERATORS
DAG2
PROGRAM
SEQUENCER
ADSP-2100 BASE
ARCHITECTURE
DATA
MEMORY
UP TO
32K
16-BIT
FULL MEMORY MODE
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| ADSP-2186LKST-115 | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 28.8MHz 28.8MIPS 100-Pin LQFP 制造商:Rochester Electronics LLC 功能描述:3.3V16BITDSP,28.8MIPS,8KWRDSPM/DM,100TQF - Bulk |
| ADSP-2186LKST-115R | 制造商:Analog Devices 功能描述:DSP Fixed-Point 16-Bit 28.8MHz 28.8MIPS 100-Pin LQFP T/R |
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