參數(shù)資料
型號: ADSP-2171BSZ-133
廠商: Analog Devices Inc
文件頁數(shù): 6/52頁
文件大小: 0K
描述: IC DSP CONTROLLER 16BIT 128PQFP
標準包裝: 1
系列: ADSP-21xx
類型: 定點
接口: 主機接口,串行端口
時鐘速率: 33MHz
非易失內(nèi)存: 外部
芯片上RAM: 10kB
電壓 - 輸入/輸出: 5.00V
電壓 - 核心: 5.00V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 128-BFQFP
供應(yīng)商設(shè)備封裝: 128-MQFP(14x20)
包裝: 托盤
REV. A
–14–
ADSP-2171/ADSP-2172/ADSP-2173
Control Registers
SPORT1 RFSDIV
Receive Frame Sync Divide Modulus
0x3FF0
15 14 13 12 11 10
9876543210
SPORT1 Autobuffer Control Register
0x3FEF
15
14
13
12
11
10
987
654
3210
0
00
0
RBUF
Receive Autobuffer Enable
TBUF
Transmit Autobuffer Enable
RMREG
Receive M Register
RIREG
Receive I Register
TMREG
Transmit M Register
TIREG
Transmit I Register
XTALDIS
XTAL Pin Drive Disable
during Powerdown
1 = disabled, 0 = enabled
(disable XTAL pin when no external
crystal connected)
XTALDELAY
4096 Cycle Delay Enable
1 = delay, 0 = no delay
PDFORCE
Powerdown Force
PUCR
Powerup Context Reset Enable
1 = soft reset (context clear),
0 = resume execution
SPORT1 SCLKDIV
Serial Clock Divide Modulus
0x3FF1
15 14 13 12 11 10
98765432
10
HIP Data Registers
HDR5
HDR4
HDR3
HDR2
HDR1
15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0
HDR0
0x3FE4
0x3FE3
0x3FE2
0x3FE1
0x3FE0
0x3FE5
HMASK Register
Host HDR5
Read
Host HDR4
Read
Host HDR3
Read
Host HDR2
Read
Host HDR1
Read
Host HDR0
Read
Host HDR0
Write
Host HDR1
Write
Host HDR2
Write
Host HDR3
Write
Host HDR4
Write
Host HDR5
Write
15 14 13 12 11 10
9876543210
0
00
0
Interrupt Enables
1 = Enable
0 = Disable
0x3FE8
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