參數(shù)資料
型號(hào): ADSP-21368KBPZ-3A
廠商: Analog Devices Inc
文件頁(yè)數(shù): 44/64頁(yè)
文件大?。?/td> 0K
描述: IC DSP 32BIT 400MHZ 256BGA
產(chǎn)品培訓(xùn)模塊: SHARC Processor Overview
標(biāo)準(zhǔn)包裝: 1
系列: SHARC®
類(lèi)型: 浮點(diǎn)
接口: DAI,DPI
時(shí)鐘速率: 400MHz
非易失內(nèi)存: ROM(768 kB)
芯片上RAM: 256kB
電壓 - 輸入/輸出: 3.30V
電壓 - 核心: 1.30V
工作溫度: 0°C ~ 70°C
安裝類(lèi)型: 表面貼裝
封裝/外殼: 256-LBGA 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝: 256-BGA(27x27)
包裝: 托盤(pán)
Rev. F
|
Page 49 of 64
|
October 2013
SPI Interface—Slave
Table 41. SPI Interface Protocol—Slave Switching and Timing Specifications
Parameter
Min
Max
Unit
Timing Requirements
t
SPICLKS
Serial Clock Cycle
4 × t
PCLK – 2
ns
t
SPICHS
Serial Clock High Period
2 × t
PCLK – 2
ns
t
SPICLS
Serial Clock Low Period
2 × t
PCLK – 2
ns
t
SDSCO
SPIDS Assertion to First SPICLK Edge, CPHASE = 0 or CPHASE = 1
2 × t
PCLK
ns
t
HDS
Last SPICLK Edge to SPIDS Not Asserted, CPHASE = 0
2 × t
PCLK
ns
t
SSPIDS
Data Input Valid to SPICLK Edge (Data Input Setup Time)
2
ns
t
HSPIDS
SPICLK Last Sampling Edge to Data Input Not Valid
2
ns
t
SDPPW
SPIDS Deassertion Pulse Width (CPHASE = 0)
2 × t
PCLK
ns
Switching Characteristics
t
DSOE
SPIDS Assertion to Data Out Active
0
6.8
ns
t
DSOE
1
SPIDS Assertion to Data Out Active (SPI2)
0
8
ns
t
DSDHI
SPIDS Deassertion to Data High Impedance
0
6.8
ns
t
DSDHI
1
SPIDS Deassertion to Data High Impedance (SPI2)
0
8.6
ns
t
DDSPIDS
SPICLK Edge to Data Out Valid (Data Out Delay Time)
9.5
ns
t
HDSPIDS
SPICLK Edge to Data Out Not Valid (Data Out Hold Time)
2 × t
PCLK
ns
t
DSOV
SPIDS Assertion to Data Out Valid (CPHASE = 0)
5 × t
PCLK
ns
1 The timing for these parameters applies when the SPI is routed through the signal routing unit. For more information, see the processor hardware reference, “Serial Peripheral
Interface Port” chapter.
Figure 37. SPI Slave Timing
tSPICHS
tSPICLS
tSPICLKS
tHDS
tSDPPW
tSDSCO
tDSOE
tDDSPIDS
tDSDHI
tHDSPIDS
tHSPIDS
tSSPIDS
tDSDHI
tDSOV
tHSPIDS
tHDSPIDS
SPIDS
(INPUT)
MISO
(OUTPUT)
MOSI
(INPUT)
MISO
(OUTPUT)
MOSI
(INPUT)
CPHASE = 1
CPHASE = 0
SPICLK
(CP = 0,
CP = 1)
(INPUT)
tSSPIDS
相關(guān)PDF資料
PDF描述
ADSP-21371BSWZ-2B IC DSP 32BIT 266MHZ 208-LQFP
ADSP-21469BBCZ-3 IC DSP 32/40BIT 400MHZ 324BGA
ADSP-21479BBCZ-2A IC DSP SHARC 266MHZ LP 196CSPBGA
ADSP-21479KBCZ-3A IC DSP SHARK 300MHZ 196CSPBGA
ADSP-21489BSWZ-3B IC CCD SIGNAL PROCESSOR 176LQFP
相關(guān)代理商/技術(shù)參數(shù)
參數(shù)描述
ADSP-21368SKBP-ENG 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Preliminary Technical Data
ADSP-21368SKBPZENG 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:Preliminary Technical Data
ADSP-21369 制造商:AD 制造商全稱(chēng):Analog Devices 功能描述:The ADSP-21367/ADSP-21368/ADSP-21369 are available with a 400 MHz core instruction rate with unique audiocentric peripherals such as the digital audio interface, S/PDIF transceiver, serial ports, 8-channel asynchronous sample rate converter, precision clock generators, and more.
ADSP-21369BBP-2A 功能描述:IC DSP 32BIT 333MHZ 256-BGA RoHS:否 類(lèi)別:集成電路 (IC) >> 嵌入式 - DSP(數(shù)字式信號(hào)處理器) 系列:SHARC® 標(biāo)準(zhǔn)包裝:2 系列:StarCore 類(lèi)型:SC140 內(nèi)核 接口:DSI,以太網(wǎng),RS-232 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:1.436MB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:-40°C ~ 105°C 安裝類(lèi)型:表面貼裝 封裝/外殼:431-BFBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:431-FCPBGA(20x20) 包裝:托盤(pán)
ADSP-21369BBPZ-2A 功能描述:IC DSP 32BIT 333MHZ 256-BGA RoHS:是 類(lèi)別:集成電路 (IC) >> 嵌入式 - DSP(數(shù)字式信號(hào)處理器) 系列:SHARC® 標(biāo)準(zhǔn)包裝:40 系列:TMS320DM64x, DaVinci™ 類(lèi)型:定點(diǎn) 接口:I²C,McASP,McBSP 時(shí)鐘速率:400MHz 非易失內(nèi)存:外部 芯片上RAM:160kB 電壓 - 輸入/輸出:3.30V 電壓 - 核心:1.20V 工作溫度:0°C ~ 90°C 安裝類(lèi)型:表面貼裝 封裝/外殼:548-BBGA,F(xiàn)CBGA 供應(yīng)商設(shè)備封裝:548-FCBGA(27x27) 包裝:托盤(pán) 配用:TMDSDMK642-0E-ND - DEVELPER KIT W/NTSC CAMERA296-23038-ND - DSP STARTER KIT FOR TMS320C6416296-23059-ND - FLASHBURN PORTING KIT296-23058-ND - EVAL MODULE FOR DM642TMDSDMK642-ND - DEVELOPER KIT W/NTSC CAMERA