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| 型號： | ADSP-21062KS-133 |
| 廠商： | Analog Devices Inc |
| 文件頁數(shù)： | 13/64頁 |
| 文件大小： | 0K |
| 描述： | IC DSP CONTROLLER 32BIT 240MQFP |
| 產(chǎn)品培訓(xùn)模塊： | SHARC Processor Overview |
| 標(biāo)準(zhǔn)包裝： | 1 |
| 系列： | SHARC® |
| 類型： | 浮點 |
| 接口： | 主機接口，連接端口，串行端口 |
| 時鐘速率： | 33MHz |
| 非易失內(nèi)存： | 外部 |
| 芯片上RAM： | 256kB |
| 電壓 - 輸入/輸出： | 5.00V |
| 電壓 - 核心： | 5.00V |
| 工作溫度： | 0°C ~ 85°C |
| 安裝類型： | 表面貼裝 |
| 封裝/外殼： | 240-BFQFP 裸露焊盤 |
| 供應(yīng)商設(shè)備封裝： | 240-MQFP-EP（32x32） |
| 包裝： | 托盤 |
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Rev. F
|
Page 20 of 64
|
March 2008
ADSP-21060/ADSP-21060L/ADSP-21062/ADSP-21062L/ADSP-21060C/ADSP-21060LC
EXTERNAL POWER DISSIPATION (3.3 V)
Total power dissipation has two components, one due to inter-
nal circuitry and one due to the switching of external output
drivers. Internal power dissipation is dependent on the instruc-
tion execution sequence and the data operands involved.
Internal power dissipation is calculated in the following way:
PINT = IDDIN
u V
DD
The external component of total power dissipation is caused by
the switching of output pins. Its magnitude depends on:
the number of output pins that switch during each cycle
(O)
the maximum frequency at which they can switch (f)
their load capacitance (C)
their voltage swing (VDD)
and is calculated by:
PEXT = O
u C u V
DD
2
u f
The load capacitance should include the processor’s package
capacitance (CIN). The switching frequency includes driving
the load high and then back low. Address and data pins can
drive high and low at a maximum rate of 1/(2tCK). The write
strobe can switch every cycle at a frequency of 1/tCK. Select pins
switch at 1/(2tCK), but selects can switch on each cycle.
Example: Estimate PEXT with the following assumptions:
A system with one bank of external data memory RAM
(32-bit)
Four 128K
u 8 RAM chips are used, each with a load of
10 pF
External data memory writes occur every other cycle, a rate
of 1/(4tCK), with 50% of the pins switching
The instruction cycle rate is 40 MHz (tCK = 25 ns)
The PEXT equation is calculated for each class of pins that can
drive:
A typical power consumption can now be calculated for these
conditions by adding a typical internal power dissipation:
PTOTAL = PEXT + (IDDIN2 u 5.0 V)
Note that the conditions causing a worst-case PEXT are different
from those causing a worst-case PINT. Maximum PINT cannot
occur while 100% of the output pins are switching from all ones
to all zeros. Note also that it is not common for an application to
have 100% or even 50% of the outputs switching
simultaneously.
ABSOLUTE MAXIMUM RATINGS
Stresses greater than those listed Table 7 may cause permanent
damage to the device. These are stress ratings only; functional
operation of the device at these or any other conditions greater
than those indicated in the operational sections of this specifica-
tion is not implied. Exposure to absolute maximum rating
conditions for extended periods may affect device reliability.
Table 6. External Power Calculations (3.3 V Devices)
Pin Type
No. of Pins
% Switching
u C
u f
u VDD2
= PEXT
Address
15
50
u 44.7 pF
u 10 MHz
u 10.9 V
= 0.037 W
MS0
10
u 44.7 pF
u 10 MHz
u 10.9 V
= 0.000 W
WR
1–
u 44.7 pF
u 20 MHz
u 10.9 V
= 0.010 W
Data
32
50
u 14.7 pF
u 10 MHz
u 10.9 V
= 0.026 W
ADDRCLK
1
–
u 4.7 pF
u 20 MHz
u 10.9 V
= 0.001 W
PEXT = 0.074 W
Table 7. Absolute Maximum Ratings
Parameter
ADSP-21060/ADSP-21060C
ADSP-21062
ADSP-21060L/ADSP-21060LC
ADSP-21062L
5 V
3.3 V
Supply Voltage (VDD)
–0.3 V to +7.0 V
–0.3 V to +4.6 V
Input Voltage
–0.5 V to VDD + 0.5 V
–0.5 V to VDD +0.5 V
Output Voltage Swing
–0.5 V to VDD + 0.5 V
Load Capacitance
200 pF
Storage Temperature Range
–65
qC to +150qC–65qC to +150qC
Lead Temperature (5 seconds)
280
qC280qC
Junction Temperature Under Bias
130
qC130qC
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