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參數(shù)資料
| 型號： | ADS8507I |
| 英文描述： | 16-BIT 40-KSPS LOW POWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH INTERNAL REFERENCE AND PARALLEL/SERIAL INTERFACE |
| 中文描述： | 16位40 kSPS的低功耗采樣模擬到數(shù)字轉(zhuǎn)換的內(nèi)部基準(zhǔn)，并行/串行接口 |
| 文件頁數(shù)： | 17/32頁 |
| 文件大小： | 738K |
| 代理商： | ADS8507I |
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1
2
t
su1
t
su1
CS
R/C
External
DATACLK
CS Set Low, Discontinuous Ext DATACLK
t
su1
t
su1
R/C
CS
External
DATACLK
R/C Set Low, Discontinuous Ext DATACLK
t
su2
t
su2
CS
R/C
t
su3
BUSY
External
DATACLK
CS Set Low, Discontinuous Ext DATACLK
ADS8507
SLAS381–DECEMBER 2006
Table 6. Timing Requirements, T
A
= –40°C to 85°C
PARAMETER
MIN
0.04
TYP
MAX
12
20
20
UNIT
μ
s
ns
μs
ns
ns
μs
μs
μs
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
μs
ns
μs
ns
ns
t
w1
t
d1
t
w2
t
d2
t
d3
t
conv
t
acq
Pulse duration, convert
Delay time, BUSY from R/C low
Pulse duration, BUSY low
Delay time, BUSY, after end of conversion
Delay time, aperture
Conversion time
Acquisition time
Cycle time
Delay time, R/C low to internal DATACLK output
Cycle time, internal DATACLK
Delay time, data valid to internal DATACLK high
Delay time, data valid after internal DATACLK low
Cycle time, external DATACLK
Pulse duration, external DATACLK high
Pulse duration, external DATACLK low
Setup time, R/C rise/fall to external DATACLK high
Setup time, R/C transition to CS transition
Delay time, SYNC, after external DATACLK high
Delay time, data valid from external DATCLK high
Delay time, CS rising edge to external DATACLK rising edge
Delay time, previous data available after CS, R/C low
Setup time, BUSY transition to first external DATACLK
Delay time, final external DATACLK to BUSY rising edge
Setup time, TAG valid
Hold time, TAG valid
12
18
5
5
18
20
5
7
t
conv
+ t
acq
t
d4
t
c1
t
d5
t
d6
t
c2
t
w3
t
w4
t
su1
t
su2
t
d7
t
d8
t
d9
t
d10
t
su3
t
d11
t
su3
t
h1
25
270
820
35
35
600
15
20
35
15
15
15
10
850
3
2
35
20
10
2
5
1
0
2
Figure 35. Critical Timing
17
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| ADS8507IB | 16-BIT 40-KSPS LOW POWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH INTERNAL REFERENCE AND PARALLEL/SERIAL INTERFACE |
| ADS8507IBDW | 16-BIT 40-KSPS LOW POWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH INTERNAL REFERENCE AND PARALLEL/SERIAL INTERFACE |
| ADS8507IBDWG4 | 16-BIT 40-KSPS LOW POWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH INTERNAL REFERENCE AND PARALLEL/SERIAL INTERFACE |
| ADS8507IBDWR | 16-BIT 40-KSPS LOW POWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH INTERNAL REFERENCE AND PARALLEL/SERIAL INTERFACE |
| ADS8507IBDWRG4 | 16-BIT 40-KSPS LOW POWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH INTERNAL REFERENCE AND PARALLEL/SERIAL INTERFACE |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS8507IB | 制造商:BB 制造商全稱:BB 功能描述:16-BIT 40-KSPS LOW POWER SAMPLING ANALOG-TO-DIGITAL CONVERTER WITH INTERNAL REFERENCE AND PARALLEL/SERIAL INTERFACE |
| ADS8507IBDW | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 40KSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS8507IBDWG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 40KSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS8507IBDWR | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 40KSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS8507IBDWRG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 16-Bit 40KSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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