參數(shù)資料
型號: ADS8422IBPFBR
廠商: TEXAS INSTRUMENTS INC
元件分類: ADC
英文描述: 1-CH 16-BIT SUCCESSIVE APPROXIMATION ADC, PARALLEL ACCESS, PQFP48
封裝: 9 X 9 MM, GREEN, PLASTIC, TQFP-48
文件頁數(shù): 11/28頁
文件大小: 1310K
代理商: ADS8422IBPFBR
www.ti.com
-VCC
0.1 F
m
+VCC
THS4031
220pF
3
2
7
4
6
-VCC
+VCC
C0G
THS4031
3
2
7
4
6
+4.096V
+VIN =
with
Vincm=0V
8Vpp
-VIN =
with
Vincm=0V
8Vpp
ADS8422
+IN
-IN
7
6
+VIN
-VIN
8Vpp
time
0 V
+4 V
-4V
49.9 W
12 W
1000 W
0.1 F
m
0.1 F
m
0.1 F
m
49.9 W
DIGITAL INTERFACE
Timing and Control
SLAS512B – JUNE 2006 – REVISED DECEMBER 2006
PRINCIPLES OF OPERATION (continued)
Figure 33. Driver Circuit for Bipolar Fully Differential Input Signals with 0-V Common-Mode
The input current on the analog inputs depends upon a number of factors: sample rate, input voltage, and
source impedance. Essentially, the current into the ADS8422 charges the internal capacitor array during the
sample period. After this capacitance has been fully charged, there is no further input current. The source of the
analog input voltage must be able to charge the input capacitance (30 pF) to a 16-bit settling level within the 70
ns acquisition time of the device. When the converter goes into hold mode, the input impedance is greater than
1 G
.
Care must be taken regarding the absolute analog input voltage. To maintain the linearity of the converter, both
-IN and +IN inputs should be within the limits specified. Outside of these ranges, the converter linearity may not
meet specifications. To minimize noise, low bandwidth input signals with low pass filters should be used.
Care should be taken to ensure that the output impedances of the sources driving the +IN and –IN inputs are
matched. If this is not observed, the two inputs could have different settling times. This may result in offset error,
gain error, and linearity error which change with temperature and input voltage.
When the converter enters hold mode, the voltage difference between the +IN and -IN inputs is captured on the
internal capacitor array.
See the timing diagrams for detailed information on timing signals and their requirements.
The ADS8422 uses an internal oscillator generated clock which controls the conversion rate and in turn the
throughput of the converter. No external clock input is required.
19
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