參數資料
型號: ADS809
英文描述: 12-Bit, 80MHz Sampling ANALOG-TO-DIGITAL CONVERTER
中文描述: 12位,80MHz的采樣模擬數字轉換器
文件頁數: 10/20頁
文件大?。?/td> 437K
代理商: ADS809
ADS809
SBAS170C
10
www.ti.com
By choosing between the three different signal input ranges,
tradeoffs can be made between noise and distortion perfor-
mance. For maximizing the SNR, which is important for time-
domain applications, the 2Vp-p range may be selected. This
range may also be used with low-level (
6dBFS to
40dBFS)
to high-frequency inputs (multi-tone). The 1.5Vp-p range may
be considered for achieving a combination of both low noise
and distortion performance. Here, the SNR number is typically
3dB down compared to the 2Vp-p range, while an improve-
ment in the distortion performance of the driver amplifier may
be realized due to the reduced output power level required.
The third option, 1Vp-p FSR, may be considered mainly for
applications requiring DC-coupling and/or single-supply op-
eration of the driver and the converter.
Input Biasing (V
CM
)
The ADS809 operates from a single +5V supply, and requires
each of the analog inputs to be externally biased to a common-
mode voltage of typically +2.5V. This allows a symmetrical
signal swing while maintaining sufficient headroom to either
supply rail. Communication systems are usually AC-coupled
in-between signal processing stages, making it convenient to
set individual common-mode voltages and allow optimizing
the DC operating point for each stage. Other applications (e.g.,
imaging) process only unipolar or DC-restored signals. In this
case, the common-mode voltage may be shifted such that the
full-input range of the converter is utilized.
It should be noted that the CM pin is internally buffered.
However, it is recommended to keep the loading of this pin
to a minimum to avoid an increase in the converter
s
nonlinearity. Also, the DC voltage at the CM pin is not exactly
+2.5V, but is subject to the tolerance of the top and bottom
references as well as the resistor ladder.
Input Impedance
The input of the ADS809 is of a capacitive nature and the
driving source needs to provide the slew current to charge or
discharge the input sampling capacitor while the track-and-
hold amplifier is in track mode, see Figure 1. This effectively
results in a dynamic input impedance that is a function of the
sampling frequency. Figure 2 depicts the differential input
impedance of the ADS809 as a function of the input frequency.
For applications that use op amps to drive the ADC, it is
recommended to add a series resistor between the amplifier
output and the converter inputs. This will isolate the converter
s
capacitive input from the driving source and avoid gain
peaking, or instability. Furthermore, it will create a 1st-order,
low-pass filter in conjunction with the specified input capaci-
tance of the ADS809. Its cutoff frequency can be adjusted
even further by adding an external shunt capacitor from each
signal input to ground. However, the optimum values of this
RC network depend on a variety of factors, including the
ADS809
s sampling rate, the selected op amp, the interface
configuration, and the particular application (time domain
versus frequency domain). Generally, increasing the size of
the series resistor and/or capacitor will improve the signal-to-
noise ratio, however, depending on the signal source, large
resistor values may reduce the harmonic distortion perfor-
mance. In any case, the use of the RC network is optional but
optimizing the values to adapt to the specific application is
encouraged.
INPUT DRIVER CONFIGURATIONS
The following section provides some principal circuit sugges-
tions on how to interface the analog input signal to the
ADS809. A first example of a typical analog interface circuit
is shown in Figure 3. Here, it is assumed that the input signal
is already available in differential form, e.g.: coming from a
preceding mixer stage. The differential driver performs an
impedance transformation as well as amplifying the signal to
match the selected full-scale input range of the ADS809 (for
example, 2Vp-p). The common-mode voltage (V
CM
) for the
converter input is established by connecting the inputs to the
midpoints of the resistor divider. The input signal is AC-
coupled through capacitors C
IN
to the inputs of the converter
that are set to a V
CM
of approximately +2.5V
DC
.
FIGURE 2. Differential Input Impedance versus Input
Frequency.
Differential
Driver
ADS809
0.1
μ
F
0.1
μ
F
REFT
REFB
IN
IN
1k
1k
1k
C
IN
C
IN
1k
V
CM
= +2.5V
V
IN
V
IN
NOTE: Reference bypassing omitted for clarity.
FIGURE 3. AC Coupling Allows for Easy DC Biasing of the
ADS809 Inputs While the Input Signal is Applied
by the Differential Input Driver.
1000
100
10
1
0.1
0.01
0.1
1
10
100
1000
ADS809 INPUT IMPEDANCE vs INPUT FREQUENCY
f
IN
(MHz)
Z
I
)
Some differential driver circuits may allow setting an appro-
priate common-mode voltage directly at the driver input.
This will simplify the interface to the ADS809 and eliminate
the external biasing resistors and the coupling capacitors.
Texas Instruments offers a line of fully differential high-
speed amplifiers. The THS4150, for example, may be used
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