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參數(shù)資料
| 型號(hào)： | ADS7812UB |
| 英文描述： | Low-Power, Serial 12-Bit Sampling ANALOG-TO-DIGITAL CONVERTER |
| 中文描述： | 低功耗，串行12位采樣模擬到數(shù)字轉(zhuǎn)換器 |
| 文件頁(yè)數(shù)： | 4/17頁(yè) |
| 文件大?。?/td> | 381K |
| 代理商： | ADS7812UB |
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4
ADS7812
PIN CONFIGURATION
PIN CONFIGURATION
Top View
DIP, SOIC
V
S
PWRD
BUSY
CS
CONV
EXT/INT
DATA
DATACLK
R1
IN
GND
R2
IN
R3
IN
BUF
CAP
REF
GND
1
2
3
4
5
6
7
8
16
15
14
13
12
11
10
9
ADS7812
ANALOG
INPUT
RANGE (V)
CONNECT
R1
IN
TO
CONNECT
R2
IN
TO
CONNECT
R3
IN
TO
INPUT
IMPEDANCE
(k
)
±
10V
V
IN
BUF
GND
45.7
0.3125V to
2.8125V
V
IN
V
IN
V
IN
> 10,000
±
5V
GND
BUF
V
IN
26.7
0V to 10V
BUF
GND
V
IN
26.7
0V to 4V
BUF
V
IN
BUF
GND
21.3
±
3.33V
V
IN
V
IN
21.3
0.5V to
4.5V
GND
V
IN
GND
21.3
TABLE I. ADS7812 Input Ranges.
PIN #
NAME
DESCRIPTION
1
R1
IN
GND
Analog Input. See Tables I and IV.
2
Ground
3
R2
IN
R3
IN
BUF
Analog Input. See Tables I and IV.
4
Analog Input. See Tables I and IV.
5
Reference Buffer Output. Connect to R1
IN
, R2
IN
, or R3
IN
, as needed.
Reference Buffer Compensation Node. Decouple to ground with a 1
μ
F tantalum capacitor in parallel with a 0.01
μ
F ceramic capacitor.
Reference Input/Output. Outputs internal +2.5V reference via a series 4k
resistor. Decouple this voltage with a 1
μ
F to 2.2
μ
F
tantalum capacitor to ground. If an external reference voltage is applied to this pin, it will override the internal reference.
6
CAP
7
REF
8
GND
Ground
9
DATACLK
Data Clock Pin. With EXT/INT LOW, this pin is an output and provides the synchronous clock for the serial data. The output
is tri-stated when CS is HIGH. With EXT/INT HIGH, this pin is an input and the serial data clock must be provided externally.
10
DATA
Serial Data Output. The serial data is always the result of the last completed conversion and is synchronized to DATACLK.
If DATACLK is from the internal clock (EXT/INT LOW), the serial data is valid on both the rising and falling edges of DATACLK.
DATA is tri-stated when CS is HIGH.
11
EXT/INT
External or Internal DATACLK Pin. Selects the source of the synchronous clock for serial data. If HIGH, the clock must be
provided externally. If LOW, the clock is derived from the internal conversion clock. Note that the clock used to time the
conversion is always internal regardless of the status of EXT/INT.
12
CONV
Convert Input. A falling edge on this input puts the internal sample/hold into the hold state and starts a conversion regardless
of the state of CS. If a conversion is already in progress, the falling edge is ignored. If EXT/INT is LOW, data from the previous
conversion will be serially transmitted during the current conversion.
13
CS
Chip Select. This input tri-states all outputs when HIGH and enables all outputs when LOW. This includes DATA, BUSY, and
DATACLK (when EXT/INT is LOW). Note that a falling edge on CONV will initiate a conversion even when CS is HIGH.
14
BUSY
Busy Output. When a conversion is started, BUSY goes LOW and remains LOW throughout the conversion. If EXT/INT is
LOW, data is serially transmitted while BUSY is LOW. BUSY is tri-stated when CS is HIGH.
15
PWRD
Power Down Input. When HIGH, the majority of the ADS7812 is placed in a low power mode and power consumption is
significantly reduced. CONV must be taken LOW prior to PWRD going LOW in order to achieve the lowest power
consumption. The time required for the ADS7812 to return to normal operation after power down depends on a number of
factors. Consult the Power Down section for more information.
16
V
S
+5V Supply Input. For best performance, decouple to ground with a 0.1
μ
F ceramic capacitor in parallel with a 10
μ
F tantalum
capacitor.
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相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADS7812UB/1K | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Power Serial 12-Bit Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7812UB/1KE4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Power Serial 12-Bit Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7812UB/1KG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Pwr Serial 12B Sampling ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7812UBE4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Power Serial 12-Bit Sampling RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7812UBG4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Low-Pwr Serial 12B Sampling ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
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