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參數(shù)資料
| 型號： | ADS7810 |
| 英文描述： | 12-Bit 800kHz Sampling CMOS ANALOG-to-DIGITAL CONVERTER |
| 中文描述： | 12位800kHz采樣CMOS模擬數(shù)字轉(zhuǎn)換器 |
| 文件頁數(shù)： | 11/11頁 |
| 文件大小： | 208K |
| 代理商： | ADS7810 |
ADS7810
11
CAP
CAP (pin 4) is the output of the internal reference buffer. A
10
μ
F tantalum capacitor should be placed as close to the
CAP as possible to provide optimum switching currents for
the CDAC throughout the conversion cycle and compensa-
tion for the output of the buffer. Using a capacitor any
smaller than 1
μ
F can cause the output buffer to oscillate and
may not have sufficient charge for the CDAC. Capacitor
values larger than 10
μ
F will have little effect on improving
performance. The voltage on the CAP pin is approximately
2V when using the internal reference, or 80% of an exter-
nally supplied reference.
LAYOUT
POWER
The ADS7810 uses the majority of its power for analog and
static circuitry, and it should be considered as an analog
component. For optimum performance, tie the analog and
digital +5V power pins to the same +5V power supply and
tie the analog and digital grounds together.
For best performance, the
±
5V supplies can be produced
from whatever analog supply is used for the rest of the
analog signal conditioning. If
±
12V or
±
15V supplies are
present, simple regulators can be used. The +5V power for
the A/D should be separate from the +5V used for the
system’s digital logic. Connecting +V
DIG
(pin 27) directly to
a digital supply can reduce converter performance due to
switching noise from the digital logic.
Although it is not suggested, if the digital supply must be
used to power the converter, be sure to properly filter the
supply. Either using a filtered digital supply or a regulated
analog supply, both V
DIG
and V
ANA
should be tied to the
same +5V source.
GROUNDING
Three ground pins are present on the ADS7810. DGND
(pin 22) is the digital supply ground. AGND2 (pin 5) is the
analog supply ground. AGND1 (pin 2) is the ground which all
analog signals internal to the A/D are referenced. AGND1 is
more susceptible to current induced voltage drops and must
have the path of least resistance back to the power supply.
All the ground pins of the ADS should be tied to the
analog ground plane, separated from the system’s digital
logic ground, to achieve optimum performance. Both ana-
log and digital ground planes should be tied to the “sys-
tem” ground as near to the power supplies as possible.
This helps to prevent dynamic digital ground currents
from modulating the analog ground through a common
impedance to power ground.
SIGNAL CONDITIONING
The FET switches used for the sample hold on many CMOS
A/D converters release a significant amount of charge injec-
tion which can cause the driving op amp to oscillate. The
resistive front end of the ADS7810 attenuates this charge
and reduces its magnitude significantly—reducing the bur-
den on the external input amplifier or buffer.
However, keep in mind that maintaining signal integrity at
voltage swings of
±
10V and frequencies of several hundred
kilohertz is extremely challenging. In addition, the external
input amplifier must drive the ADS7810 mainly during its
sample period—roughly 200ns. This will require a high-
speed, precision amplifier which can swing to greater than
±
10V.
For signals where the predominant frequencies are below
200kHz, the OPA671 operational amplifier should be ad-
equate for most applications. In some cases or where input
frequencies are higher, a composite configuration of the
OPA671 and BUF634 (in its wide bandwidth mode) may be
the best choice. See the BUF634 data sheet for more infor-
mation.
The resistive front end of the ADS7810 also provides a
guaranteed
±
25V over voltage protection. In most cases, this
eliminates the need for external input protection circuitry.
INTERMEDIATE LATCHES
The ADS7810 does have tri-state outputs for the parallel
port, but intermediate latches should be used if the bus will
be active during conversions. If the bus is not active during
conversions, the tri-state outputs can be used to isolate the
A/D from other peripherals on the same bus.
Intermediate latches are beneficial on any monolithic A/D
converter. The ADS7810 has an internal LSB size of 610
μ
V.
Transients from fast switching signals on the parallel port,
even when the A/D is tri-stated, can be coupled through the
substrate to the analog circuitry causing degradation of
converter performance.
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| ADS7810U | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 800kHz Sampling CMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7810U/1K | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 800kHz Sampling CMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7810U/1KE4 | 功能描述:模數(shù)轉(zhuǎn)換器 - ADC 12-Bit 800kHz Sampling CMOS RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類型:Differential 信噪比:107 dB 接口類型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32 |
| ADS7810U/1KG4 | 功能描述:IC 12BIT 800KHZ SMPL ADC 28SOIC 制造商:texas instruments 系列:- 包裝:帶卷（TR） 零件狀態(tài):停產(chǎn) 位數(shù):12 采樣率（每秒）:800k 輸入數(shù):1 輸入類型:單端 數(shù)據(jù)接口:并聯(lián) 配置:S/H-ADC 無線電 - S/H:ADC:1:1 A/D 轉(zhuǎn)換器數(shù):1 架構(gòu):SAR 參考類型:外部， 內(nèi)部 電壓 - 電源，模擬:±5V 電壓 - 電源，數(shù)字:5V 特性:- 工作溫度:-40°C ~ 70°C 封裝/外殼:28-SOIC（0.295"，7.50mm 寬） 供應(yīng)商器件封裝:28-SOIC 基本零件編號:ADS7810 標(biāo)準(zhǔn)包裝:1,000 |
| ADS7810U-1 | 制造商:Rochester Electronics LLC 功能描述:- Bulk |
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