參數(shù)資料
型號(hào)： ADS62P45IRGCR
廠(chǎng)商： Texas Instruments
文件頁(yè)數(shù)： 67/78頁(yè)
文件大?。?/td> 0K
描述： IC ADC 14BIT SER/PAR 125M 64VQFN
產(chǎn)品培訓(xùn)模塊： Data Converter Basics
標(biāo)準(zhǔn)包裝： 2,000
位數(shù)： 14
采樣率（每秒）： 125M
數(shù)據(jù)接口： 串行，并聯(lián)
轉(zhuǎn)換器數(shù)目： 2
電壓電源： 模擬和數(shù)字
工作溫度： -40°C ~ 85°C
安裝類(lèi)型： 表面貼裝
封裝/外殼： 64-VFQFN 裸露焊盤(pán)
供應(yīng)商設(shè)備封裝： 64-VQFN 裸露焊盤(pán)（9x9）
包裝： 帶卷 (TR)
輸入數(shù)目和類(lèi)型： 2 個(gè)差分，單極
SLAS561C
– JULY 2007 – REVISED FEBRUARY 2012
ELECTRICAL CHARACTERISTICS (continued)
Typical values are at 25
°C, AVDD = 3.3V, DRVDD = 1.8 V to 3.3 V, maximum rated sampling frequency, 50% clock duty
cycle,
–1 dBFS differential analog input, internal reference mode, applies to CMOS and LVDS interfaces, unless otherwise
noted.
Min and max values are across the full temperature range TMIN = –40°C to TMAX = 85°C, AVDD = 3.3 V, DRVDD = 3.3 V,
unless otherwise noted.
ADS62P45
ADS62P44
ADS62P43
ADS62P42
FS = 125 MSPS
FS = 105 MSPS
FS = 80 MSPS
FS = 65 MSPS
PARAMETER
TEST CONDITIONS
UNIT
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
MIN
TYP
MAX
IMD
2-Tone
F1 = 185 MHz, F2 = 190 MHz
88
87
92
dBFS
Intermodulation
each tone at -7 dBFS
Distortion
Crosstalk
Up to 100 MHz
95
dB
Recovery to within 1% (of final
Input Overload
clock
value) for 6-dB overload with sine
1
Recovery
cycles
wave input
PSRR
AC Power
for 100 mVpp signal on AVDD
35
dBc
Supply
supply
Rejection Ratio
DIGITAL CHARACTERISTICS
(1)
The DC specifications refer to the condition where the digital outputs are not switching, but are permanently at a valid logic
level 0 or 1, AVDD = 3.0 V to 3.6 V.
ADS62P45/ADS62P44
PARAMETER
TEST CONDITIONS
ADS62P43/ADS62P42
MIN
TYP
MAX
UNIT
DIGITAL INPUTS
RESET, CTRL1, CTRL2, CTRL3, SCLK, SDATA
& SEN (2)
High-level input voltage
2.4
V
Low-level input voltage
0.8
V
High-level input current
33
μA
Low-level input current
–33
μA
Input capacitance
4
pF
DIGITAL OUTPUTS
CMOS INTERFACE, DRVDD = 1.65 V to 3.6 V
High-level output voltage
DRVDD
V
Low-level output voltage
0
V
Output capacitance inside the device, from
Output capacitance
2
pF
each output to ground
DIGITAL OUTPUTS
LVDS INTERFACE, DRVDD = 3.0 V to 3.6 V, IO = 3.5 mA, RL = 100
(3)
High-level output voltage
1375
mV
Low-level output voltage
1025
mV
Output differential voltage, |VOD|
225
350
mV
VOS Output offset voltage, single-ended
Common-mode voltage of OUTP, OUTM
1200
mV
Output capacitance inside the device, from
Output capacitance
2
pF
either output to ground
(1)
All LVDS and CMOS specifications are characterized, but not tested at production.
(2)
SCLK
& SEN function as digital input pins when they are used for serial interface programming. When used as parallel control pins,
analog voltage needs to be applied as per Table 4
(3)
IO refers to the LVDS buffer current setting, RL is the differential load resistance between the LVDS output pair.
Copyright
2007–2012, Texas Instruments Incorporated
7
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參數(shù)描述
ADS62P45IRGCRG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC DUAL 14B 125MSPS Para ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS62P45IRGCT 功能描述:模數(shù)轉(zhuǎn)換器 - ADC Dual 14B 125MSPS ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS62P45IRGCTG4 功能描述:模數(shù)轉(zhuǎn)換器 - ADC DUAL 14B 125MSPS Para ADC RoHS:否 制造商:Texas Instruments 通道數(shù)量:2 結(jié)構(gòu):Sigma-Delta 轉(zhuǎn)換速率:125 SPs to 8 KSPs 分辨率:24 bit 輸入類(lèi)型:Differential 信噪比:107 dB 接口類(lèi)型:SPI 工作電源電壓:1.7 V to 3.6 V, 2.7 V to 5.25 V 最大工作溫度:+ 85 C 安裝風(fēng)格:SMD/SMT 封裝 / 箱體:VQFN-32
ADS62P45RGC 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:Dual Channel 14-Bit, 125/105/80/65 MSPS ADC with Parallel CMOS/DDR LVDS outputs
ADS62P48 制造商:TI 制造商全稱(chēng):Texas Instruments 功能描述:Dual Channel 14-/12-Bit, 250-/210-MSPS ADC With DDR LVDS and Parallel CMOS Outputs
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