參數(shù)資料
型號: ADS5273IPFPT
英文描述: 8-Channel, 12-Bit, 70MSPS ADC with Serialized LVDS Interface
中文描述: 8通道,12位,70MSPS的ADC的串行LVDS接口
文件頁數(shù): 5/16頁
文件大?。?/td> 254K
代理商: ADS5273IPFPT
"#$%&'
SBAS305A JANUARY 2004 REVISED FEBRUARY 2004
www.ti.com
5
SWITCHING CHARACTERISTICS
TMIN = 40
°
C, TMAX = +85
°
C. Typical values are at TA = 25
°
C, clock frequency = maximum specified, 50% clock duty cycle, AVDD = 3.3V,
LVDD = 3.3V, 0.5dBFS, internal voltage reference, and 2VPP differential input, unless otherwise noted.
PARAMETER
SWITCHING SPECIFICATIONS
tSAMPLE
tD(A)
Aperture Delay
Aperture Jitter (uncertainty)
tD(pipeline) Latency
tPROP
Propagation Delay
CONDITIONS
MIN
TYP
MAX
UNITS
14.3
50
ns
ps
ps
120
1
6.5
5
cycles
ns
SERIAL INTERFACE TIMING
Data is shifted in MSB first.
PARAMETER
t1
t2
t3
t4
t5
DESCRIPTION
Serial CLK Period
Serial CLK High Time
Serial CLK Low Time
Data Setup Time
Data Hold Time
MIN
50
13
13
5
5
TYP
MAX
UNIT
ns
ns
ns
ns
ns
P
Start Sequence
t
1
MSB
D6
D5
D4
D3
D2
D1
D0
t
2
t
3
t
4
t
5
ADCLK
CS
SCLK
SDATA
Outputs change on
next rising clock edge
after CS goes high.
Data latched on
each rising edge of SCLK.
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