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REV. 0
–12–
ADP3522
SIMEN
VRTCIN
VRTC
BATSNS
MVBAT
CHRDET
CHRIN
SIMVSEL
NC
VAN
VBAT
VCORE
VMEM
VBAT2
VSIM
NC
N
R
P
P
T
A
R
V
GATEDR
G
D
I
E
C
R
R
PWRON
POWERKEY
ROWX
SIMEN
VRTC
CHRIN
MVBAT
CHRDET
SIMSEL
CLKON
REFOUT
VTCXO
VAN
VCORE
RESET
VMEM
VSIM
CHGEN
EOC
C3
10 F
C4
0.1 F
C5
2.2 F
C6
2.2 F
C7
2.2 F
C10
2.2 F
C8
0.1 F
C9
0.22 F
R8
10
Li OR NiMH
BATTERY
D1
BAT1000
Q1
SI3441
R1
0.25
COIN CELL
C1
0.1 F
C2
1nF
ADP3522
GATEIN
Figure 2.
Typical Application Circuit
THEORY OF OPERATION
The ADP3522 is a power management chip optimized for use
with GSM baseband chipsets in handset applications. Figure 1
shows a block diagram of the ADP3522. The ADP3522 con-
tains several blocks, such as:
Six low dropout regulators (SIM, core, analog, crystal
oscillator, memory, real-time clock)
Reset generator
Buffered precision reference
Lithium ion charge controller and processor interface
Power on/off logic
Undervoltage lockout
Deep discharge lockout
These functions have traditionally been done either as a discrete
implementation or as a custom ASIC design. The ADP3522
combines the benefits of both worlds by providing an integrated
standard product where every block is optimized to operate in a
GSM environment while maintaining a cost competitive solution.
Figure 2 shows the external circuitry associated with the
ADP3522. Only a minimal number of support components
are required.
Input Voltage
The input voltage range of the ADP3522 is 3 V to 5.5 V and is
optimized for a single Li-Ion cell or three NiMH cells. The type
of battery, the SIM LDO output voltage, and the memory LDO
output voltage will all affect the amount of power that the
ADP3522 needs to dissipate. The thermal impedance of the
CSP package is 32
°
C/W for a JEDEC standard 4-layer board.
The end of charge voltage for high capacity NiMH cells can be as
high as 5.5 V. This results in a worst-case power dissipation for
the ADP3522-1.8 to be as high as 1.6 W for NiMH cells. The
power dissipation for the ADP3522-3 is slightly lower at 1.45 W.
A fully charged Li-Ion battery is 4.25 V, where the ADP3522-3
can dissipate a maximum power of 0.85 W. However, the
ADP3522-1.8 can have a maximum dissipation of 1.0 W.
High battery voltages normally occur when the battery is being
charged and the handset is not in conversation mode. In this
mode, there is a relatively light load on the LDOs. The worst-
case power dissipation should be calculated based on the actual
load currents and voltages used.
Figure 3 shows the maximum power dissipation as a function of
the input voltage. Figure 4 shows the maximum allowable
power dissipation as a function of the ambient temperature.
Low Dropout Regulators (LDOs)
The ADP3522 high performance LDOs are optimized for their
given functions by balancing quiescent current, dropout voltage,
regulation, ripple rejection, and output noise. 2.2
μ
F tantalum
or MLCC ceramic capacitors are recommended for use with the
core, memory, SIM, and analog LDOs. A 0.22
μ
F capacitor is
recommended for the TCXO LDO.