- 您現(xiàn)在的位置：買賣IC網(wǎng) > PDF目錄374022 > ADP3510 (Analog Devices, Inc.) Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.40V) 8-SM8 -40 to 110 PDF資料下載
參數(shù)資料
| 型號(hào)： | ADP3510 |
| 廠商： | Analog Devices, Inc. |
| 英文描述： | Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.40V) 8-SM8 -40 to 110 |
| 中文描述： | CDMA的電源管理系統(tǒng) |
| 文件頁(yè)數(shù)： | 2/16頁(yè) |
| 文件大小： | 283K |
| 代理商： | ADP3510 |
第1頁(yè)當(dāng)前第2頁(yè)第3頁(yè)第4頁(yè)第5頁(yè)第6頁(yè)第7頁(yè)第8頁(yè)第9頁(yè)第10頁(yè)第11頁(yè)第12頁(yè)第13頁(yè)第14頁(yè)第15頁(yè)第16頁(yè)
REV. 0
–2–
P
arameter
SHUTDOWN SUPPLY CURRENT
VBAT
￡
2.5 V
(Deep Discharged Lockout Active)
2.5 V < VBAT
￡
3.2 V (UVLO Active)
VBAT >3.2 V
OPERATING GROUND CURRENT
All LDOs On Except TCXO
All LDOs On
All LDOs On
Symbol
ICC
Conditions
Min
Typ
Max
Unit
VBAT = VBAT2 = 2.3 V
5
15
m
A
VBAT = VBAT2 = 3.15 V
VBAT = VBAT2 = 4.0 V
30
45
55
60
m
A
m
A
IGND
Minimum Loads
Minimum Loads
Maximum Loads
300
340
2.0
390
430
3.5
mA
mA
% of
Max Load
Current
V
mV
V
UVLO ON THRESHOLD
UVLO HYSTERESIS
DEEP DISCHARGED LOCKOUT
ON THRESHOLD
DEEP DISCHARGED LOCKOUT
HYSTERESIS
INPUT HIGH VOLTAGE (PWRONIN,
TCXOEN, CHGEN, GATEIN)
INPUT LOW VOLTAGE (PWRONIN,
TCXOEN, CHGEN, GATEIN)
INPUT HIGH BIAS CURRENT
(PWRONIN, TCXOEN,
CHGEN, GATEIN)
INPUT LOW BIAS CURRENT
(PWRONIN, TCXOEN,
CHGEN, GATEIN)
PWRONKEY INPUT HIGH VOLTAGE
PWRONKEY INPUT LOW VOLTAGE
PWRONKEY INPUT PULLUP
RESISTANCE TO VBAT
THERMAL SHUTDOWN THRESHOLD
2
THERMAL SHUTDOWN HYSTERESIS
ROWX CHARACTERISTICS
ROWX Output Low Voltage
VBAT
VBAT
VBAT
3.1
3.2
200
2.4
3.3
2.0
2.75
VBAT
100
mV
V
IH
2.0
V
V
IL
0.4
V
I
IH
1.0
m
A
I
IL
–1.0
m
A
V
IH
V
IL
0.7
VBAT
V
0.3
VBAT V
70
105
150
25
145
k
W
oC
oC
V
OL
PWRONKEY = Low
I
OL
= 200
m
A
PWRONKEY = High
V(ROWX) = 5 V
0.4
V
ROWX Output High Leakage Current
I
L
1
m
A
I/O LDO (VIO)
Output Voltage
Line Regulation
Load Regulation
Output Capacitor Required for Stability
Dropout Voltage
VIO
D
VIO
D
VIO
C
O
V
DO
Line, Load, Temp
Minimum Load
50
m
A
￡
I
LOAD
￡
25 mA
2.85
2.935
1
3
3.02
V
mV
mV
m
F
2.2
V
O
= V
INITIAL
– 100 mV
I
LOAD
= 25 mA
50
150
mV
DIGITAL CORE LDO (VCORE)
Output Voltage
Line Regulation
Load Regulation
Output Capacitor Required for Stability
VCORE
D
VCORE
D
VCORE
C
O
Line, Load, Temp
Minimum Load
50
m
A
￡
I
LOAD
￡
120 mA
1.78
1.85
1
8
1.92
V
mV
mV
m
F
2.2
ADP3510–SPECIFICATIONS
ELECTRICAL CHARACTERISTICS
1
(–20 C T
A
+85 C, VBAT = VBAT2 = 3.2 V–7.5 V, CVIO = CVCORE = CVAN = CVMEM = 2.2
VTCXO = 0.47
F, CVBAT = 10 F, min. loads applied on all outputs, unless otherwise noted.)
F,
相關(guān)PDF資料 |
PDF描述 |
|---|---|
| ADP3510ARU | Secondary Over-Voltage Protection for 2-4 cell in series Li-Ion/Poly (4.40V) 8-SM8 -40 to 110 |
| ADP3522 | GSM Power Management System |
| ADP3522ACP-1.8 | GSM Power Management System |
| ADP3522ACP-3 | GSM Power Management System |
| ADP3604 | |
相關(guān)代理商/技術(shù)參數(shù) |
參數(shù)描述 |
|---|---|
| ADP3510ARU | 制造商:AD 制造商全稱:Analog Devices 功能描述:CDMA Power Management System |
| ADP3510ARU-REEL7 | 制造商:Analog Devices 功能描述: |
| ADP3522 | 制造商:AD 制造商全稱:Analog Devices 功能描述:GSM Power Management System |
| ADP3522ACP-1.8 | 制造商:AD 制造商全稱:Analog Devices 功能描述:GSM Power Management System |
| ADP3522ACP-1.8-RL | 制造商:Analog Devices 功能描述:GSM Power Management System 32-Pin LFCSP EP T/R |
發(fā)布緊急采購(gòu)，3分鐘左右您將得到回復(fù)。