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| 型號： | ADM1041AARQZ-REEL |
| 廠商： | ANALOG DEVICES INC |
| 元件分類： | 通信及網(wǎng)絡(luò) |
| 英文描述： | Secondary-Side Controller with Current Share and Housekeeping |
| 中文描述： | SPECIALTY TELECOM CIRCUIT, PDSO24 |
| 封裝： | LEAD FREE, MO-137AE, QSOP-24 |
| 文件頁數(shù)： | 17/56頁 |
| 文件大?。?/td> | 991K |
| 代理商： | ADM1041AARQZ-REEL |
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ADM1041A
Mnemonic
DC_OK
Rev. 0 | Page 17 of 56
Description
The DC_OK function advises the system on the status of the power supply. When it is false, the system is
assured of at least 1 ms of operation if ac power is lost for any reason. Other turn-off modes provide more
warning time. This pin is an open-drain output. It can be configured as a P-channel pull-up or an N-channel
pull-down. It may also be configured as positive or negative (inverted) logic.
The AC_OK function advises the system whether or not sufficient bulk voltage is present to allow reliable
operation. The system may choose to shut down if this pin is false. The power supply normally tries to
maintain normal operation as long as possible, although DC_OK goes false when only a millisecond or so of
operation time is left. This pin is an open-drain output. It can be configured as a P-channel pull-up or an N-
channel pull-down. It may also be configured as positive or negative (inverted) logic.
The DC_OK output is kept false for typically 100 ms to 900 ms during power-up.
When the system is to be shut down in response to PSON going low, or in response to an OCP or OTP event, a
signal is first sent to the DC_OK output to go false as a warning that power is about to be lost. PEN is signaled
false typically 2 ms later (configurable).
All of the inputs to the logic core are first debounced or digitally filtered to improve noise immunity. The
debounce period for OV events is in the order of 16 μs, for UV events it is 450 μs, and for PSON it is typically
80 ms (configurable).
A voltage from the secondary of the power transformer, which can provide an analog of the bulk supply, is
rectified and lightly filtered and measured by the ac sense function. At start-up, if this voltage is adequate,
this function signals the end-user system that it is okay to start. If a brown-out occurs or ac power is removed,
this function can provide early warning that power is about to be lost and allow the system to shut down in
an orderly manner. While ACSENSE is low, UVB is enabled, which means undervoltage protection is not
initiated. If ac power is so low that the converter cannot continue to operate, other protection circuits on the
primary side normally shut down the converter. When an adequate voltage level is resumed, a power-up
cycle is initiated.
As well as providing ACSENSE, the preceding connection to the transformer is used to gate the operation of
the OrFET circuit. If the output of the transformer is good, the OrFET circuit allows gate drive to the OrFET.
ACSENSE Hysteresis. Configurable voltage on the ACSENSE input allows the ACSENSE upper and lower
threshold to be adjusted to suit different amounts of low frequency ripple present on the bulk capacitor.
An alternate form of ac sense can be accepted by the ADM1041A. This may in the form of an opto-coupled
signal from the primary side where the actual level sensing might be done. As with the above, while ac is low
and UVB is disabled, AC_OK is false and DC_OK is true. Any brownout protection that might be required on
the primary is done on the primary side.
At start-up, the voltage reference to the voltage error amplifier is brought up slowly in approximately 127
steps to provide a controlled rate of rise of the output voltage.
An OVP fault on the auxiliary supply to the ADM1041A causes a standard OVP operation (see the OVP
function in this table).
A UVL fault on the auxiliary supply to the IC causes a standard UVP operation (see the UVP function in this
table).
In this mode, the housekeeping circuit attempts to restart the supply after an undervoltage event at about 1
second intervals. No other fault can initiate auto-restart.
The internal precision reference is monitored by a separate reference for overvoltage and allows truly
redundant OVP. The externally available reference is also monitored for an undervoltage that would indicate
a short on the pin.
The internal ground is constantly monitored against the VS- pin. If the chip ground goes positive with respect
to this pin, it indicates that the chip ground is open-circuit either inside the ADM1041A or the external wiring.
The ADM1041A would be latched off, similar to an OV event.
AC_OK
DC_OK on delay
DC_OK off delay
Debounce Digital Noise
Filter
ACSENSE1
Pulse OK
AC Hysteresis
ACSENSE2
Soft-Start
VDD–OVP
VDD–UVL
Auto Restart Mode
VREF–MON
GND–MON
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| ADM1041AARQZ-REEL7 | 功能描述:IC SECONDARY SIDE CTRLR 24QSOP RoHS:是 類別:集成電路 (IC) >> PMIC - 電源控制器，監(jiān)視器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 應(yīng)用:多相控制器 輸入電壓:- 電源電壓:9 V ~ 14 V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（5x5） 包裝:帶卷 (TR) |
| ADM1041A-EVALZ | 功能描述:BOARD EVAL FOR ADM1041A RoHS:是 類別:編程器，開發(fā)系統(tǒng) >> 評估板 - DC/DC 與 AC/DC（離線）SMPS 系列:- 標(biāo)準(zhǔn)包裝:1 系列:- 主要目的:DC/DC，步降 輸出及類型:1，非隔離 功率 - 輸出:- 輸出電壓:3.3V 電流 - 輸出:3A 輸入電壓:4.5 V ~ 28 V 穩(wěn)壓器拓?fù)浣Y(jié)構(gòu):降壓 頻率 - 開關(guān):250kHz 板類型:完全填充 已供物品:板 已用 IC / 零件:L7981 其它名稱:497-12113STEVAL-ISA094V1-ND |
| ADM1041ARQ | 功能描述:IC PWR SUPP MON/LOAD SHAR 24QSOP RoHS:否 類別:集成電路 (IC) >> PMIC - 電源控制器，監(jiān)視器 系列:- 產(chǎn)品培訓(xùn)模塊:Lead (SnPb) Finish for COTS Obsolescence Mitigation Program 標(biāo)準(zhǔn)包裝:2,500 系列:- 應(yīng)用:多相控制器 輸入電壓:- 電源電壓:9 V ~ 14 V 電流 - 電源:- 工作溫度:-40°C ~ 85°C 安裝類型:表面貼裝 封裝/外殼:40-WFQFN 裸露焊盤 供應(yīng)商設(shè)備封裝:40-TQFN-EP（5x5） 包裝:帶卷 (TR) |
| ADM1041ARQ-2 | 制造商:Rochester Electronics LLC 功能描述: 制造商:Analog Devices 功能描述: |
| ADM1041ARQ-REEL | 制造商:AD 制造商全稱:Analog Devices 功能描述:Secondary-Side Controller with Current Share and Housekeeping |
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