參數(shù)資料
型號: ADM1030ARQZ-RL7
廠商: ON Semiconductor
文件頁數(shù): 12/30頁
文件大?。?/td> 327K
描述: IC SNSR TEMP/FAN PWM CTRL 16QSOP
產(chǎn)品變化通告: MFG CHG Notification ADI to ON Semi
Product Obsolescence 11/Feb/2009
標(biāo)準(zhǔn)包裝: 1,000
功能: 風(fēng)扇控制,溫度監(jiān)控器
傳感器類型: 內(nèi)部和外部
感應(yīng)溫度: 0°C ~ 100°C,外部傳感器
精確度: ±1°C,±1°C(最小值)
拓?fù)洌?/td> ADC,比較器,多路復(fù)用器,寄存器庫
輸出類型: SMBus?
輸出警報:
輸出風(fēng)扇:
電源電壓: 3 V ~ 5.5 V
工作溫度: 0°C ~ 100°C
安裝類型: 表面貼裝
封裝/外殼: 16-SSOP(0.154",3.90mm 寬)
供應(yīng)商設(shè)備封裝: 16-QSOP
包裝: 帶卷 (TR)
ADM1030
http://onsemi.com
12
generated. Software may then decide whether the
fan should run to cool the CPU. This allows the
system to run in SILENT MODE.
3. If the THERM
-to-Fan Enable bit is set to 1, the fan
will run full-speed whenever THERM
 is asserted
low. In this case, both throttling and active cooling
take place. If the high temperature limit is
programmed to a lower value than the THERM
limit, exceeding the high temperature limit will
assert INT
 low. Software could change the speed
of the fan depending on temperature readings. If
the temperature continues to increase and exceeds
the THERM
 limit, THERM
 asserts low to throttle
the CPU and the fan runs full-speed. This allows
the system to run in PERFORMANCE MODE,
where active cooling takes place and the CPU is
only throttled at high temperature.
Using the high temperature limit and the THERM
 limit in
this way allows the user to gain maximum performance from
the system by only slowing it down, should it be at a critical
temperature.
Although the ADM1030 does not have a dedicated
Interrupt Mask Register, clearing the appropriate enable bits
in Configuration Register 2 will clear the appropriate
interrupts and mask out future interrupts on that channel.
Disabling interrupt bits will prevent out-of-limit conditions
from generating an interrupt or setting a bit in the Status
Registers.
Using THERM
 as an Input
The THERM
 pin is an open-drain input/output pin. When
used as an output, it signals over-temperature conditions.
When asserted low as an output, the fan will be driven
full-speed if the THERM
-to-Fan Enable bit is set to 1 (Bit 7
of Register 0x3F). When THERM
 is pulled low as an input,
the THERM
 bit (Bit 7) of Status Register 2 is set to 1, and
the fan is driven full-speed. Note that the THERM
-to-Fan
Enable bit has no effect whenever THERM
 is used as an
input. If THERM
  is pulled low as an input, and the
THERM-
to-Fan Enable bit = 0, the fan will still be driven
full-speed. The THERM
-to-Fan Enable bit only affects the
behavior of THERM
 when used as an output.
Status Registers
Registers 1 and 2 (0x02, 0x03). Bits 0 and 1 (Alarm
Speed, Fan Fault) of Status Register 1, once set, may be
cleared by reading Status Register 1. Once the Alarm Speed
bit is cleared, this bit will not be reasserted on the next
monitoring cycle even if the condition still persists. This bit
may be reasserted only if the fan is no longer at Alarm Speed.
Bit 1 (Fan Fault) is set whenever a fan tach failure is
detected.
Once cleared, it will reassert on subsequent fan tach
failures.
Bits 2 and 3 of Status Register 1 are the Remote
Temperature High and Low status bits. Exceeding the high
or low temperature limits for the external channel sets these
status bits. Reading the status register clears these bits.
However, these bits will be reasserted if the out-of limit
condition still exists on the next monitoring cycle. Bits 6 and
7 are the Local Temperature High and Low status bits. These
behave exactly the same as the Remote Temperature High
and Low status bits. Bit 4 of Status Register 1 indicates that
the Remote Temperature THERM limit has been exceeded.
This bit gets cleared on a read of Status Register 1 (see
Figure 20). Bit 5 indicates a Remote Diode Error. This bit
will be a 1 if a short or open is detected on the Remote
Temperature channel on power-up. If this bit is set to 1 on
power-up, it cannot be cleared. Bit 6 of Status Register 2
(0x03) indicates that the Local THERM limit has been
exceeded. This bit is cleared on a read of Status Register 2.
Bit 7 indicates that THERM
 has been pulled low as an input.
This bit can also be cleared on a read of Status Register 2.
Figure 20. Operation of THERM
 and INT
 Signals
THERM
LIMIT
THERM
INT
TEMP
STATUS REG. READ
INT
 REARMED
5?/DIV>
Figure 20 shows the interaction between INT
  and
THERM
. Once a critical temperature THERM limit is
exceeded, both INT
 and THERM
 assert low. Reading the
Status Registers clears the interrupt and the INT
 pin goes
high. However, the THERM pin remains asserted until the
measured temperature falls 5癈 below the exceeded
THERM
 limit. This feature can be used to CPU throttle or
drive a fan full-speed for maximum cooling. Note, that the
INT
 pin for that interrupt source is not rearmed until the
temperature has fallen below the THERM limit 5癈. This
prevents unnecessary interrupts from tying up valuable CPU
resources.
Modes of Operation
The ADM1030 has four different modes of operation.
These modes determine the behavior of the system.
1. Automatic Fan Speed Control Mode
2. Filtered Automatic Fan Speed Control Mode
3. PWM Duty Cycle Select Mode (Directly Sets Fan
Speed Under Software Control)
4. RPM Feedback Mode
Automatic Fan Speed Control
The ADM1030 has a local temperature channel and a
remote temperature channel, which may be connected to an
on-chip diode-connected transistor on a CPU. These two
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