formula. The values of RG
參數(shù)資料
型號: ADL5565ACPZ-R7
廠商: Analog Devices Inc
文件頁數(shù): 11/28頁
文件大?。?/td> 0K
描述: IC AMP DIFF 6GHZ 16LFCSP
特色產(chǎn)品: RF ICs
標(biāo)準(zhǔn)包裝: 1
放大器類型: RF/IF 差分
電路數(shù): 1
轉(zhuǎn)換速率: 11000 V/µs
-3db帶寬: 7GHz
電流 - 輸入偏壓: 5µA
電流 - 電源: 80mA
電流 - 輸出 / 通道: 30mA
電壓 - 電源,單路/雙路(±): 2.8 V ~ 5.2 V
工作溫度: -40°C ~ 85°C
安裝類型: 表面貼裝
封裝/外殼: 16-WFQFN 裸露焊盤,CSP
供應(yīng)商設(shè)備封裝: 16-LFCSP-WQ(3x3)
包裝: 標(biāo)準(zhǔn)包裝
其它名稱: ADL5565ACPZ-R7DKR
Data Sheet
ADL5565
The single-ended gain can be determined using the following
formula. The values of RG and RX for each gain configuration
are shown in Table 9.
L
X
S
X
S
G
V
R
A
+
×
+
×
+
×
+
×
+
=
10
2
200
1
(2)
In Equation 2, RG is the gain setting resistor (see Figure 1).
Table 9. Values of RG and RX for Single-Ended Gain
Gain (dB)
R
G ()
R
X ()
5.3
100
R2 || 1582
10.3
50
R2 || 962
13
33.5
R2 || 742
G is the gain setting resistor (see Figure 1).
2 These values are based on a 50 input match.
GAIN ADJUSTMENT AND INTERFACING
The effective gain of the ADL5565 can be reduced using a number
of techniques. A matched attenuator network can reduce the
effective gain; however, this requires the addition of a separate
component that can be prohibitive in size and cost. Instead, a
simple voltage divider can be implemented using the combination
of additional series resistors at the amplifier input and the input
impedance of the ADL5565, as shown in Figure 36. A pair of
resistors is used to match to the impedance of the previous stage.
0.1F
1/2 RSHUNT
1/2 RS
AC
0.1F 1/
2 RSERIES
VIP1
VIN2
VIN1
VIP2
1/2 RSERIES
1/2 RSHUNT
ADL5565
09959-
038
Figure 36. Gain Adjustment Using a Series Resistor
Figure 36 shows a typical implementation of the divider concept
that effectively reduces the gain by adding attenuation at the
input. For frequencies less than 100 MHz, the input impedance
of the ADL5565 can be modeled as a real 66 , 100 , or 200
resistance (differential) for maximum, middle, and minimum
gains, respectively. Assuming that the frequency is low enough
to ignore the shunt reactance of the input and high enough so
that the reactance of moderately sized ac coupling capacitors
can be considered negligible, the insertion loss, Il, due to the
shunt divider can be expressed as
+
=
G
SERIES
G
R
dB
Il
log
20
)
(
(3)
In Equation 3, RG is the gain setting resistor (see Figure 1).
Adjusted Gain (dB) =
6 dB, 12 dB, or 15.5 dB Gain – Il (dB)
(4)
The necessary shunt component, RSHUNT, to match to the source
impedance, RS, can be expressed as
G
SERIES
S
SHUNT
R
+
=
1
(5)
In Equation 5, RG is the gain setting resistor (see Figure 1).
The insertion loss and the resultant power gain for multiple
shunt resistor values are summarized in Table 10. The source
resistance and input impedance need careful attention when
using Equation 3, Equation 4, and Equation 5. The reactance
of the input impedance of the ADL5565 and the ac coupling
capacitors must be considered before assuming that they make
a negligible contribution.
Table 10. Differential Gain Adjustment Using Series Resistor
Gain
(dB)
Differential
R
G ()
R
S ()
Differential
R
SERIES ()
Differential
R
SHUNT ()
200
50
200
57.6
200
50
154
57.6
200
50
118
59
200
50
84.5
60.4
200
50
52.3
61.9
200
50
24.9
64.9
200
50
0
66.5
100
50
78.7
69.8
100
50
59
73.2
100
50
42.2
76.8
100
50
26.7
82.5
100
50
12.7
88.7
100
50
0
100
66.7
50
23.7
113
66.7
50
13.7
133
66.7
50
0
200
1 Amplifier is configured for 6 dB gain setting.
2 Amplifier is configured for 12 dB gain setting.
3 Amplifier is configured for 15.5 dB gain setting.
G is the gain setting resistor (see Figure 1).
5 The resistor values are rounded to the nearest real resistor value.
Rev. E | Page 19 of 28
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